WM8321 datasheet(43/253 Pages) WOLFSON

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WM8321

PD, February 2012, Rev 4.0

12.3 4-WIRE (SPI) CONTROL MODE

In this mode, the WM8321 registers are accessed using a 4-wire serial control interface. The CS

¯¯ and

SCLK1 pins provide the ‘Chip Select’ and ‘Serial Data Clock’ functions respectively. Serial data input

is supported on the SDA1 pin; serial data output is supported on the SDOUT1 pin.

A control word consists of 32 bits. The first bit is the read/write bit (R/W), which is followed by 15

address bits (A14 to A0) that determine which control register is accessed. The remaining 16 bits

(B15 to B0) are data bits, corresponding to the 16 bits in each control register.

In Write operations (R/W=0), all SDA1 bits are driven by the controlling device. Each rising edge of

SCLK1 clocks in one data bit from the SDA1 pin. A rising edge on CS

¯¯ latches in a complete control

word consisting of the last 32 bits.

In Read operations, the SDA1 pin is ignored following receipt of the valid register address. The data

bits are output by the WM8321 on the SDOUT1 pin. SDOUT1 is undriven (high impedance) when not

outputting register data bits.

The SDOUT1 pin is an Open Drain output; an external pull-up resistor to DBVDD is required on

SDOUT1 in 4-wire (SPI) mode.

The sequence of signals associated with a register write operation is illustrated in Figure 14.

R/W

A14

A13

A12

SDIN

SCLK

15-bit control register address

16-bit control register data

B15

B14

B13

Figure 14 Control Interface 4-wire (SPI) Register Write

The sequence of signals associated with a register read operation is illustrated in Figure 15.

Figure 15 Control Interface 4-wire (SPI) Register Read

12.4 REGISTER LOCKING

Selected registers are protected by a security key. These registers can only be written to when the

appropriate ‘unlock’ code has been written to the Security Key register.

The protected registers include those associated with Reset Control, OTP Programming and RTC

Trim. Other selected functions also include protected registers; the affected registers are identified in

the Register Map definitions throughout the document, and also in Section 29.

To unlock the protected registers, a value of 9716h must be written to the Security register (R16392),

as defined in Table 13.

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