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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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WM8321 数据表(PDF) 151 Page - Wolfson Microelectronics plc |
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WM8321 数据表(HTML) 151 Page - Wolfson Microelectronics plc |
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151 / 253 page  Production Data WM8321 w PD, February 2012, Rev 4.0 151 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO 8 GP9_LVL 0 GPIO9 level. When GP9_FN = 0h and GP9_DIR = 0, write to this bit to set a GPIO output. Read from this bit to read GPIO input level. When GP9_POL is 0, the register contains the opposite logic level to the external pin. 7 GP8_LVL 0 GPIO8 level. When GP8_FN = 0h and GP8_DIR = 0, write to this bit to set a GPIO output. Read from this bit to read GPIO input level. When GP8_POL is 0, the register contains the opposite logic level to the external pin. 6 GP7_LVL 0 GPIO7 level. When GP7_FN = 0h and GP7_DIR = 0, write to this bit to set a GPIO output. Read from this bit to read GPIO input level. When GP7_POL is 0, the register contains the opposite logic level to the external pin. 5 GP6_LVL 0 GPIO6 level. When GP6_FN = 0h and GP6_DIR = 0, write to this bit to set a GPIO output. Read from this bit to read GPIO input level. When GP6_POL is 0, the register contains the opposite logic level to the external pin. 4 GP5_LVL 0 GPIO5 level. When GP5_FN = 0h and GP5_DIR = 0, write to this bit to set a GPIO output. Read from this bit to read GPIO input level. When GP5_POL is 0, the register contains the opposite logic level to the external pin. 3 GP4_LVL 0 GPIO4 level. When GP4_FN = 0h and GP4_DIR = 0, write to this bit to set a GPIO output. Read from this bit to read GPIO input level. When GP4_POL is 0, the register contains the opposite logic level to the external pin. 2 GP3_LVL 0 GPIO3 level. When GP3_FN = 0h and GP3_DIR = 0, write to this bit to set a GPIO output. Read from this bit to read GPIO input level. When GP3_POL is 0, the register contains the opposite logic level to the external pin. 1 GP2_LVL 0 GPIO2 level. When GP2_FN = 0h and GP2_DIR = 0, write to this bit to set a GPIO output. Read from this bit to read GPIO input level. When GP2_POL is 0, the register contains the opposite logic level to the external pin. 0 GP1_LVL 0 GPIO1 level. When GP1_FN = 0h and GP1_DIR = 0, write to this bit to set a GPIO output. Read from this bit to read GPIO input level. When GP1_POL is 0, the register contains the opposite logic level to the external pin. Register 400Ch GPIO Level |
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