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CS1630-FSZ 数据表(PDF) 12 Page - Cirrus Logic |
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CS1630-FSZ 数据表(HTML) 12 Page - Cirrus Logic |
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12 / 56 page ![]() CS1630/31 12 DS954F2 5. GENERAL DESCRIPTION 5.1 Overview The CS1630 and CS1631 are high-performance offline AC/DC LED drivers for dimmable and high color rendering index (CRI) LED replacement lamps and luminaires. They feature Cirrus Logic’s proprietary digital dimmer compatibility control technology and digital correlated color temperature (CCT) control system that enables two-channel LED color mixing. The CS1630 is designed for 120VAC line voltage applications, and the CS1631 is optimized for 230VAC line voltage applications. The CS1630/31 integrates a critical conduction mode (CRM) boost converter, providing power factor correction and superior dimmer compatibility with a primary-side regulated quasi- resonant second stage, which is configurable for isolated and non-isolated topologies. The digital CCT control system provides the ability to program dimming profiles, such as constant CCT dimming and black body line dimming. The CS1630/31 optimizes LED color mixing by temperature compensating LED current with an external negative temperature coefficient (NTC) thermistor. The IC controller is also equipped with power line calibration for remote system calibration and end-of-line programming. The CS1630/31 provides a register lockout feature for security against potential access to proprietary registers. 5.2 Startup Circuit An external, high-voltage source-follower circuit is used to deliver startup current to the IC. During steady-state operation, an auxiliary winding on the boost inductor biases this circuit to an off state to improve system efficiency, and all IC supply current is generated from the auxiliary winding. The patent pending technology of the external, high-voltage source- follower circuit enables system compatibility with digital dimmers (dimmers containing an internal power supply) by providing a continuous path for a dimmer’s power supply to recharge during its off state. During steady-state operation, high-voltage FET Q1 is source-switched by a variable internal current source on the SOURCE pin to create the boost circuit. A Schottky diode with a forward voltage less than 0.6V is recommended for D5. Schottky diode D5 will limit inrush current through the internal diode, preventing damage to the IC. 5.3 Dimmer Switch Detection The CS1630/31 dimmer switch detection algorithm determines if the solid-state lighting system is controlled by a regular switch, a leading-edge dimmer, or a trailing-edge dimmer. Dimmer switch detection is implemented using two modes: Dimmer Learn Mode and Dimmer Validate Mode. These assist in limiting the system power losses. Once the IC reaches UVLO start threshold VST(th) and begins operating, the CS1630/31 is in Dimmer Learn Mode, allowing the dimmer switch detection circuit to set the operating state of the IC to one of three modes: No-dimmer Mode, Leading-edge Mode, or Trailing-edge Mode. 5.3.1 Dimmer Learn Mode In Dimmer Learn Mode, the dimmer detection circuit spends approximately two line-cycles learning whether there is a dimmer switch and, if present, whether it is a trailing-edge or leading-edge dimmer. A modified version of the leading-edge algorithm is used. The trailing-side slope of the input line voltage is sensed to decide whether the dimmer switch is a trailing-edge dimmer. The dimmer detection circuit transitions to Dimmer Validate Mode once the circuit detects that a dimmer is present. 5.3.2 Dimmer Validate Mode During normal operation, CS1630/31 is in Dimmer Validate Mode. This instructs the dimmer detection circuit to periodically validate that the IC is executing the correct algorithm for the attached dimmer. The dimmer detection algorithm periodically verifies the IC operating state as a protection against incorrect detection. As additional protection, the output of the dimmer detection algorithm is low-pass filtered to prevent noise or transient events from changing the IC’s operating mode. The IC will return to Dimmer Learn Mode when it has determined that the wrong algorithm is being executed. 5.3.3 No-dimmer Mode Upon detection that the line is not phase cut with a dimmer, the CS1630/31 operates in No-dimmer Mode, where it provides a power factor that is in excess of 0.9. The CS1630/31 accomplishes this by boosting in CRM and DCM mode. The peak current is modulated to provide link regulation. The CS1630/31 alternates between two settings of peak current. To regulate the boost output voltage, the CS1630/31 uses a peak current set by register PEAK_CUR (see "Peak Current (PEAK_CUR) – Address 51" on page 39). The time that this current is used is determined by an internal compensation loop to regulate the boost output voltage. The internal algorithm will reduce the peak current of the boost stage to maintain output voltage regulation and obtain the desired power factor. |
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