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ADV601

–24–

REV. 0

Video Formats — Multiplexed Philips Video

The ADV601 supports a hybrid mode of operation that is a cross

between standard dual lane Philips and single lane CCIR-656. In

this mode, video data is multiplexed in the same fashion in CCIR-656,

but the values 0 and 255 are not reserved as signaling values. In-

stead, external HSYNC and VSYNC pins are used for signaling

and video synchronization. VCLK may range up to 29.5 MHz.

VCLK is driven with up to a 29.5 MHz 50% duty cycle clock

synchronous with the video data. Video data is clocked on the

rising edge of the VCLK signal. The functionality of HSYNC,

VSYNC, and FIELD pins is dependent on three programmable

modes of the ADV601: Master-Slave Control, Encode-Decode

Control, and 525-625 Control. Table XI summarizes the func-

tionality of these pins in various modes.

Table XI. Philips Multiplexed Video Master and Slave Modes HSYNC, VSYNC, and FIELD Functionality

HSYNC, VSYNC and FIELD

Functionality for Multiplexed

Master Mode (HSYNC, VSYNC

Slave Mode (HSYNC, VSYNC

Philips

and FIELD Are Outputs)

and FIELD Are Inputs)

Encode Mode (video data is input

The ADV601 completely manages the generation and

These pins are used to control the

to the chip)

timing of these pins. The device driving the ADV601

blanking of video and sequencing.

video interface must use these outputs to remain in

sync with the ADV601. It is expected that this com-

bination of modes would not be used frequently.

Decode Mode (video data is output

The ADV601 completely manages the generation

These pins are used to control the

from the chip)

and timing of these pins.

blanking of video and sequencing.

Video Formats — Gray Scale Video

The Gray Scale video format requires 4:0:0 data (up to 12 bits)

be transmitted over a one “lane” 8- to 12-bit physical interface.

A video clock (typically 27 MHz) is transmitted along with the

data. This clock is synchronous with the data and runs at twice

the transfer rate of the interface. The color space is Gray Scale.

Because the ADV601 internal processing is not dependent on

color space, Gray Scale data is processed in the same manner as

data in other color spaces.

VCLK is driven with a 24.54 MHz–29.5 MHz, 50% duty cycle

clock which is synchronous with the video data. Video data is

clocked on the second rising edge of the VCLK signal.

These video formats require external synchronization and

blanking signals to accompany digital video. These signals are

VSYNC, HSYNC, and FIELD. In general, when the ADV601

is configured as an encoder, these signals will all be inputs.

When the ADV601 is configured as a decoder, these signals will

be outputs. There are special cases for this format described in

Table XII.

Table XII. Gray Scale Video Master and Slave Modes HSYNC, VSYNC and FIELD Functionality

HSYNC, VSYNC, and FIELD

Functionality for Gray Scale

Master Mode (HSYNC, VSYNC,

Slave Mode (HSYNC, VSYNC,

Format

CREF and FIELD Are Outputs)

CREF and FIELD Are Inputs)

Encode Mode (video data is input

The ADV601 completely manages the generation and

These pins are used to control the

to the chip)

timing of these pins. The device driving the ADV601

blanking of video and sequencing.

video interface must use these outputs to remain in

sync with the ADV601. It is expected that this com-

bination of modes would not be used frequently.

Decode Mode (video data is output

The ADV601 completely manages the generation

These pins are used to control the

from the chip)

and timing of these pins.

blanking of video and sequencing.

Video Formats—References

For more information on video interface standards, see the

following reference texts.

• For the definition of CCIR-601:

1992 – CCIR Recommendations RBT series Broadcasting Service

(Television) Rec. 601-3 Encoding Parameters of digital television

for studios, page 35, September 15, 1992.

• For the definition of CCIR-656:

1992 – CCIR Recommendations RBT series Broadcasting Service

(Television) Rec. 656-1 Interfaces for digital component video

signals in 525 and 626 line television systems operating at the

4:2:2 level of Rec. 601, page 46, September 15, 1992.

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