数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

ADV601JS 数据表(PDF) 33 Page - Analog Devices

部件名 ADV601JS
功能描述  Low Cost Multiformat Video Codec
PDF  52 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADV601JS 数据表(HTML) 33 Page - Analog Devices

Back Button ADV601JS Datasheet HTML 29Page - Analog Devices ADV601JS Datasheet HTML 30Page - Analog Devices ADV601JS Datasheet HTML 31Page - Analog Devices ADV601JS Datasheet HTML 32Page - Analog Devices ADV601JS Datasheet HTML 33Page - Analog Devices ADV601JS Datasheet HTML 34Page - Analog Devices ADV601JS Datasheet HTML 35Page - Analog Devices ADV601JS Datasheet HTML 36Page - Analog Devices ADV601JS Datasheet HTML 37Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 33 / 52 page
background image
ADV601
–33–
REV. 0
A2
A3
D0–D7
VCLK
CREF
VSYNC
HSYNC
VDATA [2:9]
LLC
CREF
ODD
HREF
FIELD
XTAL
SAA7110
29.50000MHz PAL
OR
24.54543MHz NTSC
ADR0
ADR1
DQ0–DQ7
DQ8–DQ15
DQ16–DQ23
DQ24–DQ31
RF
26.80000MHz
XTAL
A0–A8
D0–D15
A0–A8
DQ1–DQ16
ADV601
SYSTEM
DEPENDENT
ASIC
DRAM
(256K X 16-BIT)
COMPOSITE VIDEO INPUT
VCLKO
TOSHIBA TC514265DJ/DZ/DFT-60
NEC
uPD424210ALE-60
NEC
uPD42S4210ALE-60
HITACHI HM514265CJ-60
ANY DRAM USED WITH THE ADV601
MUST MEET THE MINIMUM SPECIFICATIONS
OUTLINED FOR THE HYPER MODE DRAMS
LISTED
VDATA [12:19]
Y[0–7]
UV[7–0]
RXD
TCLK
TXD
RTF
TFS
RD
SCLK
TD
TF
ADSP-21xx
BE0
VS
BE1
BE2
BE3
CS
RD
WR
DIRQ
ACK
RAS
CAS
WE
RAS
CAS
OE
WEL
WEH
IRQ2
BE0
BE1
BE2
BE3
CS
RD
WR
Figure 15. Suggested Standalone Application Design
ADR1
ADR2
DATA0–7
DATA8-15
ADR0
CLKIN
FLIN2
FLIN0
VCLK
CREF
VSYNC
HSYNC
VDATA [2:9]
LLC
CREF
ODD
HREF
FIELD
XTAL
SAA7110
29.50000MHz PAL
OR
24.54543MHz NTSC
ADR0
ADR1
DQ0–DQ7
DQ8–DQ15
DQ16–DQ23
DQ24–DQ31
STATS_R
LCODE
26.80000MHz
XTAL
A0–A8
D0–D15
A0–A8
DQ1–DQ16
THE ADSP-21csp01 INTERNAL CLOCK RATE
DOUBLE THE INPUT CLOCK
*THE INPUT CLOCK RATE = 1/2 OF THE INTERNAL
CLOCK RATE, RANGING FROM 12 TO 21MHz
ADV601
ADSP-21csp01
DRAM
(256K X 16-BIT)
COMPOSITE VIDEO INPUT
VCLKO*
TOSHIBA TC514265DJ/DZ/DFT-60
NEC
uPD424210ALE-60
NEC
uPD42S4210ALE-60
HITACHI
HM514265CJ-60
ANY DRAM USED WITH THE ADV601
MUST MEET THE MINIMUM SPECIFICATIONS
OUTLINED FOR THE HYPER MODE DRAMS
LISTED
FIFO_SRQ
FIFO_STP
FIFO_ERR
VDATA [0:19]
Y[0–7]
UV[7–0]
IRQ0
FLIN1
IOMS
RD
WR
VS
BE0
BE1
BE2
BE3
CS
RD
WR
HIRQ
ACK
RAS
CAS
WE
RAS
CAS
OE
WEL
WEH
IOACK
Figure 16. Alternate Standalone Application Design



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com