EPF10K100 datasheet(121/128 Pages) ALTERA

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Altera Corporation

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FLEX 10K Embedded Programmable Logic Device Family Data Sheet

fMAX

Maximum operating frequency in MHz

Total number of logic cells used in the device

togLC

Average percent of logic cells toggling at each clock

(typically 12.5%)

Constant, shown in Tables 114 and 115

This calculation provides an ICC estimate based on typical conditions with

no output load. The actual ICC should be verified during operation

because this measurement is sensitive to the actual pattern in the device

and the environmental operating conditions.

To better reflect actual designs, the power model (and the constant K in

the power calculation equations) for continuous interconnect FLEX

devices assumes that logic cells drive FastTrack Interconnect channels. In

contrast, the power model of segmented FPGAs assumes that all logic

cells drive only one short interconnect segment. This assumption may

lead to inaccurate results, compared to measured power consumption for

an actual design in a segmented interconnect FPGA.

Figure 32 shows the relationship between the current and operating

frequency of FLEX 10K devices.

Table 114. FLEX 10K K Constant Values

Device

K Value

EPF10K10

EPF10K20

EPF10K30

EPF10K40

EPF10K50

EPF10K70

EPF10K100

Table 115. FLEX 10KA K Constant Values

Device

K Value

EPF10K10A

EPF10K30A

EPF10K50V

EPF10K100A

EPF10K130V

EPF10K250A

EPF10K100 数据表(PDF) 121 Page - Altera Corporation

EPF10K100 数据表(HTML) 121 Page - Altera Corporation

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