CS9211 datasheet(37/62 Pages) NSC

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Functional Description (Continued)

Figure 3-13. Panel Power Sequence

PWRUP_PHASE_2

Panel Power-Up Phase 2: Selects the interval between enabling FP_VDDEN to enabling panel data

and control signals. 0 = 32 ms ±1.0 ms; 1 = 128 ms ±4.0 ms.

PWRUP_PHASE_1

Panel Power-Up Phase 1: Selects the interval between enabling the panel data signals to enabling

FP_VCONEN. 0 = 32 ms ±1.0 ms; 1 = 128 ms ±4.0 ms.

PWRUP_PHASE_0

Panel Power-Up Phase 0: Selects the interval between disabling FP_VCONEN to disabling DIS-

POFF#. This bit is ineffective if independent DISPOFF# control is selected by bit 25.

0 = 32 ms ±1.0 ms; 1 = 128 ms ±4.0 ms.

PWRDN_PHASE_0

Panel Power-Down Phase 0: Selects the interval between disabling panel DISPOFF# to disabling

FP_VCONEN. See Figure 3-13 on page 37. This bit is ineffective if independent DISPOFF# control is

selected by bit 25. 0 = 32 ms ±1.0 ms; 1 = 128 ms ±4.0 ms.

PWRDN_PHASE_1

Panel Power-Down Phase 1: Selects the interval between disabling FP_VCONEN to disabling the

panel data signals. See Figure 3-13 "Panel Power Sequence" on page 37.

0 = 32 ms ±1.0 ms; 1 = 128 ms ±4.0 ms.

PWRDN_PHASE_2

Panel Power-Down Phase 2: Selects the interval between disabling the panel data signals to dis-

abling panel FP_VDDEN. See Figure 3-13 "Panel Power Sequence" on page 37.

0 = 32 ms ±1.0 ms; 1 = 128 ms ±4.0 ms.

Table 3-18. Power Sequence Control Bits (Continued)

Bit

Name

Description

FP_VDDEN

FP_VCONEN

DISPOFF#

Data and

Control

Signal

bit 23

bit 18

tU1

tU2

tU3

tD3

tD2

tD1

bit 19

bit 20

bit 21

bit 22

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