ADE9078 datasheet(46/108 Pages) AD

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Data Sheet

ADE9078

Rev. 0 | Page 45 of 107

Energy and Phase Selection

The CFxSEL[2:0] bits in the CFMODE register select which

type of energy to output on the CFx pin, including total active

power, VAR, VA, or fundamental VAR. The TERMSELx bits in the

COMPMODE register select which phase energies to include in

the CFx output.

For example, with CF1SEL = 000 and TERMSEL1 = 111, CF1

indicates the total active power output of Phase A, Phase B, and

Phase C.

To calibrate the Phase A, Phase B, and Phase C total active

power accumulation at the same time, using CF1 for total

AWATT, CF2 for total BWATT, and CF3 for total CWATT,

configure TERMSEL1 = 010, and TERMSEL2 = 100.

Configuring the Maximum CF Pulse Output Frequency

The xTHR registers determine the maximum output rate from

the digital to frequency converter. It is recommended to write

xTHR = 0x0010 0000. After the CFxDEN pulses are generated,

a CFx pulse is issued. CFxDEN can range from 2 to 65,535. The

relationship between the xTHR, CFxDEN, and AWATT values

is given in the following equation:













CFxDEN

xTHR

AWATT

DTOF

512

(Hz)

where:

fDTOF is 4.096 MHz.

AWATT is the value at full scale, 20,823,646.

xTHR is 0x0010 0000.

CFxDEN is 2.

The maximum recommended CF pulse output frequency is

79.4 kHz.

kHz

512

0000

0010

20,823,646

096

(Hz)













Maximum

The default CFx pulse output using power on reset values of

xTHR and CFxDEN with full-scale inputs is

xFFFF

512

FFFF

0000

20,823,646

096

(Hz)













Maximum

Configuring the CF Pulse Width

The pulse width is determined by the CFx_LT bit in the

CF_LCFG register and the CF_LTMR register value.

When CFx_LT = 0, the active low pulse width is set at 80 ms for

frequencies lower than 1/(2 × 80 ms) = 6.25 Hz. For higher

frequencies, the duty cycle is 50% if CFxDEN is even or (1 +

1/CFxDEN) × 50% if CFxDEN is odd.

If CFx_LT is set to 1, the CF active low pulse width is CF_LTMR ×

6/CLKIN. The maximum CF_LTMR value is 327,680 =

0x0005 0000, which results in a 327,680/(6/CLKIN) = 80 ms pulse.

CF_LTMR must be greater than zero.

CFx Pulse Sign

Some applications must record positive and negative energy

usage separately. To enable this operation, the SUMxSIGN bits

in the PHSIGN register indicate whether the sum of the energy

that went into the last CFx pulse was positive or negative.

SUMxSIGN = 0 if the sum of the energy that went into the CFx

pulse is positive and equal to one if the sum of the energy was

negative.

Additionally, the REVPSUMx bits in the STATUS0 register and

EVENT_STATUS register indicate if the CFx polarity changed

sign. For example, if the last CF2 pulse was positive reactive

energy and the next CF2 pulse is negative reactive energy, the

REVPSUM2 bit in the STATUS0 and EVENT_STATUS registers is

set, which can be enabled to generate an interrupt on IRQ0.

Clearing the CFx Accumulator

The user may want to clear out a partial CFx accumulation, for

example, during the power up and initialization process. To clear

the accumulation in the digital to frequency converter and CFDEN

counter, write 1 to the CF_ACC_CLR bit in the CONFIG1 register.

The CF_ACC_CLR bit automatically clears itself.

Disabling the CFx Pulse Output and CFx Interrupt

To disable the CFx pulse output and keep the CFx output high,

write a one to the CFxDIS bit in the CFMODE register. If the

CFxDIS bit in the CFMODE register is set, the CFx bit in

STATUS0 is not set when a new CFx pulse is ready. Note that

the REVPSUMx bits, which indicate if CFx pulses were positive

or negative, are not affected by the CFxDIS setting.

MEASUREMENTS (PSM1)

Overview

It is possible to tamper an energy meter by disconnecting the

voltage inputs or the neutral. Some regions require monitoring

of the current inputs for several days after the voltage inputs to

the meter have been cut, to check for this kind of tamper condition.

The PSM1 and PSM2 operating modes in conjunction with

PSM3 enable low power consumption when checking for and

billing for a tamper of this kind.

PSM1 enables fast measurement of IRMS, VRMS, active power,

and VAR with a reduced set of functions compared to PSM0.

To measure using PSM1, change the PM1 and PM0 pins to 0

and 1, respectively, to select the PSM1 operating mode. Then,

configure the IC by writing to the xIGAIN, xVGAIN, and

xPGAIN registers. Write to the run register to start the measure-

ments. To achieve the specified accuracy, stay in PSM1 mode for

the time indicated in Table 8 before reading the measurement

results via the SPI port (see the PSM1 Startup Flow section for

detailed information).

After the PSM1 results are read, change the PM1 and PM0 pins

to 1 and 1, respectively, to enter PSM3 for one minute. Then,

enter PSM1 by making PM1 and PM0 pins equal to 1 and 0,

respectively, to make measurements and begin the process again.

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