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L3GD20H 数据表(PDF) 17 Page - STMicroelectronics |
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L3GD20H 数据表(HTML) 17 Page - STMicroelectronics |
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17 / 52 page ![]() DocID023469 Rev 2 17/52 L3GD20H Application hints 3 Application hints Figure 5. L3GD20H electrical connections and external components values Power supply decoupling capacitors (100 nF + 10 μF) should be placed as near as possible to the device (common design practice). If Vdd and Vdd_IO are not connected together, 100 nF and 10 μF decoupling capacitors must be placed between Vdd and common ground while 100 nF between Vdd_IO and common ground. Capacitors should be placed as near as possible to the device (common design practice). (TOP VIEW) 1 X +ΩZ DIRECTIONS OF THE DETECTABLE ANGULAR RATES +ΩX +ΩY Vdd 10µF GND 100nF Vdd_IO SCL/SPC 1 8 5 5 13 TOP VIEW 6 14 16 9 9 GND C1 10nF(25V)* GND * SDA/SDI/SDO C1 must guarantee 1nF value under 12V bias condition GND SDO CS 100nF Vdd I2C bus Rpu Rpu = 10kOhm SCL/SPC SDA_SDI_SDO Pull-up to be added when I2C interface is used GAMS080220130927FSR |
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