L3GD20H datasheet(34/52 Pages) STMICROELECTRONICS

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Output register mapping

L3GD20H

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DocID023469 Rev 2

Output register mapping

The table given below provides a listing of the 8 bit registers embedded in the device and

the related addresses:

Table 17. Register address map

Name

Type

Default

Hex

Binary

Reserved

00-0E

WHO_AM_I

000 1111

11010111

Reserved

10-1F

CTRL1

010 0000

00000111

CTRL2

010 0001

00000000

CTRL3

010 0010

00000000

CTRL4

010 0011

00000000

CTRL5

010 0100

00000000

REFERENCE

010 0101

00000000

OUT_TEMP

010 0110

Output

STATUS

010 0111

Output

OUT_X_L

010 1000

Output

OUT_X_H

010 1001

Output

OUT_Y_L

010 1010

Output

OUT_Y_H

010 1011

Output

OUT_Z_L

010 1100

Output

OUT_Z_H

010 1101

Output

FIFO_CTRL

010 1110

00000000

FIFO_SRC

010 1111

Output

IG_CFG

011 0000

00000000

IG_SRC

011 0001

Output

IG_THS_XH

011 0010

00000000

IG_THS_XL

011 0011

00000000

IG_THS_YH

011 0100

00000000

IG_THS_YL

011 0101

00000000

IG_THS_ZH

011 0110

00000000

IG_THS_ZL

011 0111

00000000

IG_DURATION

011 1000

00000000

LOW_ODR

011 1001

00000000

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