L3GD20H datasheet(45/52 Pages) STMICROELECTRONICS

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L3GD20H

Interrupt source register. Read only register.

Reading at this address clears IG_SRC IA bit (and eventually the interrupt signal on INT1

pin) and allows the refresh of data in the IG_SRC register if the latched option was chosen.

7.17

IG_THS_XH (32h)

7.18

IG_THS_XL (33h)

7.19

IG_THS_YH (34h)

X high. Default value: 0 (0: no interrupt, 1: X High event has occurred)

X low. Default value: 0 (0: no interrupt, 1: X Low event has occurred)

Table 47. IG_SRC description

Table 48. IG_THS_XH register

DCRM

THSX14

THSX13

THSX12

THSX11

THSX10

THSX9

THSX8

Table 49. IG_THS_XH description

DCRM

Interrupt generation counter mode selection. Default value: 0

0 = Reset

1 = Decrement

THSX14 - THSX8

Interrupt threshold on X axis. Default value: 000 0000

Table 50. IG_THS_XL register

THSX7

THSX6

THSX5

THSX4

THSX3

THSX2

THSX1

THSX0

Table 51. IG_THS_XL description

THSX7 - THSX0

Interrupt threshold on X axis. Default value: 0000 0000

Table 52. IG_THS_YH register

THSY14

THSY13

THSY12

THSY11

THSY10

THSY9

THSY8

Table 53. IG_THS_YH description

THSY14 - THSY8

Interrupt threshold on Y axis. Default value: 000 0000

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