L3GD20H datasheet(22/52 Pages) STMICROELECTRONICS

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Digital main blocks

L3GD20H

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DocID023469 Rev 2

dynamic-stream mode (FIFO_CTRL(FM2:0) = 110)

the number of new data available in

FIFO does not depend on previous reading.

In dynamic-stream mode FIFO_SRC(FSS4:0) + 1 is the number of new X, Y and Z samples

available in the FIFO buffer.

Stream mode is intended to be used reading all 32 samples of FIFO within an ODR after

receiving an overrun signal.

Dynamic-stream is intended to be used to read FIFO_SRC(FSS4:0) + 1 samples when it is

not possible to guarantee data reading within an ODR.

In dynamic-stream mode

FIFO_CTRL(FTH4:0) setting should be between 1 and 30.

Also a FIFO Threshold interrupt CTRL3(INT2_FTH) can be enabled in order to read data

from the FIFO and let free memory slot for data incoming. Setting the FIFO_CTRL(FTH4:0)

to N value, the number of X, Y and Z data samples that should be read at FIFO Threshold

interrupt rising, in order to read the whole FIFO content, is N + 2.

Figure 11. Dynamic stream mode

4.2.4

Stream-to-FIFO mode

In stream-to-FIFO mode (FIFO_CTRL(FM2:0) = 011), FIFO behavior changes according to

IG_SRC(IA) bit. When IG_SRC(IA) bit is equal to '1' FIFO operates in FIFO-mode, when

IG_SRC(IA) bit is equal to '0' FIFO operates in Stream mode.

Interrupt generator

should be set to the desired configuration by means of IG_CFG,

IG_THS_XH, IG_THS_XL, IG_THS_YH, IG_THS_YL, IG_THS_ZH and IG_THS_ZL.

IG_CFG(LIR) bit should be put to '1' in order to have latched interrupt.

GAMS310120131023FSR

L3GD20H 数据表(PDF) 22 Page - STMicroelectronics