A8603KESTR-R datasheet(14/42 Pages) ALLEGRO

14 / 42 page

Multiple-Output Regulator for

Automotive LCD Displays

A8603

Allegro MicroSystems, LLC

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

Registers

Default

Address

Comments

Regulator Programming

0x00-0x13

AVDD_voltage

0x40

0x00

7 bits adjust AVDD regulator output from 5 V to 15 V in 78.74 mV step.

VCOM_voltage_msb

0x1

0x01

9 bits adjust VCOM regulator output from 2.5 V to 7.5 V in 9.785 mV step.

Must be programmed in the order of MSB followed by LSB.

VCOM_voltage_lsb

0x0

0x02

VGL_voltage

0x20

0x03

6 bits adjust VGL regulator output from –3.6 V to –13.03 V in –150 mV step.

VGH_voltage

0x40

0x04

7 bits adjust VGH regulator output from 9.9 V to 31.236 V in 168 mV step.

delay_startup_AVDD

0x0

0x05

Program the turn-on delay for AVDD. 100 µs step size. 0 ms to 25.5 ms.

delay_startup_VCOM

0x20

0x06

Program the turn-on delay for VCOM (after AVDD). 100 µs step size. 0 ms

to 25.5 ms. See Startup Timing diagram.

delay_startup_VGL

0x40

0x07

Program the turn-on delay for VGL. 100 µs step size. 0 ms to 25.5 ms.

delay_startup_VGH

0x40

0x08

Program the turn-on delay for VGH (after VGL). 100 µs step size. 0 ms to

25.5 ms.

watchdog_timer

0x10

0x09

Maximum time allowing regulator to reach its target value. 3.2 ms step.

9.6 ms to 99.2 ms. Same value is used for all regulators.

fault_counter

0x8

0x0A

Programmable counter allowing system to reattempt 0 to 15 times at the

event of fault.

cooldown_timer

0x20

0x0B

Prevent immediate reattempt after the fault. System will wait for timer

to expire before possible reattempt to turn on the regulators. Step size

3.2 ms. Range 9.6 ms to 201.6 ms.

delay_shutdown_AVDD

0x0

0x0C

Program the turn-off delay for AVDD (after VCOM). 100 µs step size. 0 ms

to 25.5 ms. See Shutdown Timing diagram.

delay_shutdown_VCOM

0x0

0x0D

Program the turn-off delay for VCOM. 100 µs step size. 0 ms to 25.5 ms.

delay_shutdown_VGL

0x0

0x0E

Program the turn-off delay for VGL (after VGH). 100 µs step size. 0 ms to

25.5 ms.

delay_shutdown_VGH

0x0

0x0F

Program the turn-off delay for VGH. 100 µs step size. 0 ms to 25.5 ms.

dither

0x0

0x10

Bit[1,0] for dither programming (off/5%/10%/15%);

Bit4 for VGL/VGH power sequence option.

regulator_internal_enable

0x0

0x11

‘1’ = Turn all regulators on. ‘0’ = OFF

spare1

0x0

0x12

Spare

spare2

0x0

0x13

Spare

Fault Status

0x14-0x1B

output_status_now

0x0

0x14

Present output voltage status of regulators (over 10%, 30%, or 90%)

ilimt_status_now

0x0

0x15

Present output current status of regulators (OCP)

fault_status_now

0x0

0x16

Present fault status (TSD, FSET_short, SW_OVP, SW_OCP, etc.)

output_status_hold

0x0

0x17

Latched output voltage status (over 120% or under 80%)

ilimt_status_hold

0x0

0x18

Latched output current status

fault_status_hold

0x0

0x19

Latched fault status

rstatus_hold

0x01

0x1A

Retry counter status [bit 4:7], Diagnostic [2,3], Hard_Reset [1], and POR [0].

sstatus_hold

0x0

0x1B

OVP/UVP status of regulators during startup

Table 5: I2C Register Map

A8603KESTR-R 数据表(PDF) 14 Page - Allegro MicroSystems

A8603KESTR-R 数据表(HTML) 14 Page - Allegro MicroSystems

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42

数据表下载

链接网址

A8603KESTR-R 数据表(PDF) 14 Page - Allegro MicroSystems

A8603KESTR-R 数据表(HTML) 14 Page - Allegro MicroSystems

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42

数据表 下载

链接网址

数据表下载