数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

A8603KESTR-R 数据表(PDF) 17 Page - Allegro MicroSystems

部件名 A8603KESTR-R
功能描述  Multiple-Output Regulator for Automotive LCD Displays
PDF  42 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  ALLEGRO [Allegro MicroSystems]
网页  http://www.allegromicro.com
标志 ALLEGRO - Allegro MicroSystems

A8603KESTR-R 数据表(HTML) 17 Page - Allegro MicroSystems

Back Button A8603KESTR-R Datasheet HTML 13Page - Allegro MicroSystems A8603KESTR-R Datasheet HTML 14Page - Allegro MicroSystems A8603KESTR-R Datasheet HTML 15Page - Allegro MicroSystems A8603KESTR-R Datasheet HTML 16Page - Allegro MicroSystems A8603KESTR-R Datasheet HTML 17Page - Allegro MicroSystems A8603KESTR-R Datasheet HTML 18Page - Allegro MicroSystems A8603KESTR-R Datasheet HTML 19Page - Allegro MicroSystems A8603KESTR-R Datasheet HTML 20Page - Allegro MicroSystems A8603KESTR-R Datasheet HTML 21Page - Allegro MicroSystems Next Button
Zoom Inzoom in Zoom Outzoom out
 17 / 42 page
background image
Multiple-Output Regulator for
Automotive LCD Displays
A8603
17
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
DESCRIPTION OF REGULATORS
AVDD Regulator
The AVDD output is driven by a linear regulator, which takes its
input power from the boost output voltage. The target voltage of
AVDD is programmable through Register 0x00 (7 bits). Its range
is between 5 V (Register = 0x00) and 15 V (Register = 0x7F)
in 127 steps, with step resolution = 78.74 mV. A representative
block diagram is shown in Figure 3.
The AVDD circuit monitors the voltage drop across its linear
regulator. If this voltage drop is less than the headroom required
(approximately 2 V between OUT and AVDD), the monitor cir-
cuit sends a control signal to cause the boost voltage to increase.
This ensures there is always enough headroom for regulation.
Figure 3: Representative Block Diagram of the
AVDD Regulator
VCOM Regulator
The VCOM output is also driven by a linear regulator similar to the
case of AVDD, except that it takes its input power from the regulated
AVDD output voltage. This arrangement gives VCOM exceptional
stability over full operating temperature range. The target volt-
age of VCOM is programmable through Register 0x01-02 (9 bits
total). Its range is between 2.5 V (Register=0x0000) and 7.5 V
(Register=0x01FF) in 511 steps, with step resolution = 9.785 mV.
In order to ensure there is enough headroom, AVDD must be at
least 1.5 V higher than VCOM.
If VCOM is not required, the VCOM pin can be left open, but a
small output capacitor (approximately 0.1 μF) must be present to
prevent oscillation.
VOUT
AVDD
AGND
Target Voltage
PMOS
From boost
output
OCP
RSC
To boost
controller
CAVDD
(external)
250
Discharge
R
1.8 V
DAC
I2C Register
0x00
7
1.8 V
2 V
Reference
Voltage
Enable
Fold
Back
Linear Regulator
+



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com