COP8-REF-AM datasheet(49/83 Pages) NSC

49 / 83 page

15.0 A/D Converter

This device contains a 7-channel, multiplexed input, succes-

sive approximation, 10-bit Analog-to-Digital Converter with

Programmable Gain Amplifier. One A/D channel is internally

connected to the temperature sensor. The remaining six

channels are connected to pins B2-B7 and are available

external to the device. Pins AV

CC and AGND are used for the

A/D Converter, Temperature Sensor, Programmable Gain

Amplifier, and Stand-Alone Amplifier.

15.1 9.1 OPERATING MODES

The simplified block diagram of the A/D Converter is shown

in Figure 25.

The A/D Converter supports both Single Ended and Differ-

ential modes of operation. Differential mode is only sup-

ported when the programmable gain amplifier is bypassed.

Two specific analog channel selection modes are supported.

These are as follows:

Allow any specific channel, except for the temperature

sensor input, with or without the programmable gain

amplifier, to be selected at one time. The A/D Converter

performs the specific conversion requested and stops.

When using the temperature sensor, the programmable

gain amplifier is required. See the Temperature Sensor

section for more details on using the temperature sen-

sor.

Allow any differential channel pair to be selected at one

time. The A/D Converter performs the specific differen-

tial conversion requested and stops. Differential mode is

only supported when the programmable gain amplifier is

bypassed.

In both Single Ended mode and Differential mode, there is

the capability to connect the analog multiplexor output, with

the exception of the temperature sensor input, and A/D

converter input to external pins. This provides the ability to

externally connect a common filter/signal conditioning circuit

for the A/D Converter.

The A/D Converter is supported by six memory mapped

registers: two result registers, the control register, two offset

trimming registers, and the gain register. When the device is

reset, the mode control register (ENAD) is cleared, the A/D is

powered down and the A/D result registers have unknown

data. The offset trim registers are also initialized to 40 Hex

on Reset and need to be re-trimmed, if being used. The gain

15.1.1 A/D Control Register

The control register, ENAD contains 4 bits for channel se-

lection, 1 bit for mode selection, 1 bit for the multiplexor

output selection, 1 bit for prescaler selection, and a Busy bit.

An A/D conversion is initiated by setting the ADBSY bit in the

ENAD control register. The result of the conversion is avail-

able to the user in the A/D result registers, ADRSTH and

ADRSTL, when ADBSY is cleared by the hardware on

completion of the conversion.

TABLE 21. ENAD Register

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Channel Select

Mode

Select

Mux/Out Prescale

Busy

ADCH3

ADCH2

ADCH1

ADCH0

ADMOD

MUX

PSC

ADBSY

15.1.1.1 Channel Select

This 4-bit field selects one of seven channels to be the V

IN+.

The mode selection and the mux output determine the V

IN-

input. When MUX = 0, all seven channels are available, as

shown in Table 22. When MUX = 1, only 4 channels are

available, as shown in Table 23.

20006355

FIGURE 25. Simplified A/D Converter Block Diagram

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