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LSM9DS1 数据表(PDF) 23 Page - STMicroelectronics |
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LSM9DS1 数据表(HTML) 23 Page - STMicroelectronics |
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23 / 72 page ![]() DocID025715 Rev 3 23/72 LSM9DS1 LSM9DS1 functionality 72 3.5 Accelerometer and gyroscope FIFO The LSM9DS1 embeds 32 slots of 16-bit data FIFO for each of the gyroscope’s three output channels, yaw, pitch and roll, and 16-bit data FIFO for each of the accelerometer’s three output channels, X, Y and Z. This allows consistent power saving for the system since the host processor does not need to continuously poll data from the sensor, but it can wake up only when needed and burst the significant data out from the FIFO. This buffer can work accordingly to five different modes: Bypass mode, FIFO-mode, Continuous mode, Continuous-to-FIFO mode and Bypass-to-Continuous. Each mode is selected by the FMODE [2:0] bits in the FIFO_CTRL (2Eh) register. Programmable FIFO threshold status, FIFO overrun events and the number of unread samples stored are available in the FIFO_SRC (2Fh) register and can be set to generate dedicated interrupts on the INT1_A/G pin in the INT1_CTRL (0Ch) register and on the INT2_A/G pin in the INT2_CTRL (0Dh) register. FIFO_SRC (2Fh)(FTH) goes to '1' when the number of unread samples (FIFO_SRC (2Fh) (FSS5:0)) is greater than or equal to FTH [4:0] in FIFO_CTRL (2Eh). If FIFO_CTRL (2Eh) (FTH[4:0]) is equal to 0, FIFO_SRC (2Fh)(FTH) goes to ‘0’. FIFO_SRC (2Fh)(OVRN) is equal to '1' if a FIFO slot is overwritten. FIFO_SRC (2Fh)(FSS [5:0]) contains stored data levels of unread samples. When FSS [5:0] is equal to ‘000000’ FIFO is empty, when FSS [5:0] is equal to ‘100000’ FIFO is full and the unread samples are 32. The FIFO feature is enabled by writing '1' in CTRL_REG9 (23h) (FIFO_EN). To guarantee the correct acquisition of data during the switching into and out of FIFO mode, the first sample acquired must be discarded. 3.5.1 Bypass mode In Bypass mode (FIFO_CTRL (2Eh)(FMODE [2:0]= 000), the FIFO is not operational and it remains empty. Bypass mode is also used to reset the FIFO when in FIFO mode. As described in Figure 10, for each channel only the first address is used. When new data is available the old data is overwritten. Figure 10. Bypass mode x0 y z0 y0 x1 y1 z1 x2 y2 z2 x31 y31 z31 xi,yi,zi empty |
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