FXLS8964AF datasheet(3/98 Pages) NXP

3 / 98 page

NXP Semiconductors

FXLS8964AF

3-Axis Low-g Accelerometer

FXLS8964AF

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Objective data sheet

Rev. 2 — 30 October 2020

3 / 98

5 Block diagram

Digital Signal

Processing

Oscillators,

Clock Generators

Voltage References

and Regulators

Trim Control Logic

3-Axis Acceleration Sensor

ax,y,z

OTP

VDD

GND

MUX

C2V

ADC-12

Gain

Temp

LPF

Self-Test

Sensor Data

Change Detection

Function

6D Orientation

Detection Function

(Portrait/Landscape/

UP/DOWN)

Vector Magnitude

WAKE Power Mode

WAKE ODR (HPM/LPM);

DECIMATION[WAKE],

IDLE_TIME[WAKE] (FPM)

SLEEP Power Mode

SLEEP ODR (HPM/LPM);

DECIMATION[SLEEP],

IDLE_TIME[SLEEP] (FPM)

Auto-WAKE/SLEEP

Sensor

Configuration

and Output

Registers

Digital

Interface

Auto-WAKE/SLEEP Logic with Programmable Inactivity Counter

Proof

Mass

Proof

Mass

X+

Y+

Z+

X–

Y–

Z–

SCL /

SCLK

SDA /

SPI_MOSI /

SPI_DATA

SA0 /

SPI_MISO

SPI_CS_B /

WAKE_UP

INTF_SEL

INT1 /

MOT_DET

INT2 /

EXT_TRIG /

BOOT_OUT

BT_MODE

Figure 1. Block Diagram

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