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FXLS8964AF 数据表(PDF) 60 Page - NXP Semiconductors

部件名 FXLS8964AF
功能描述  3-Axis Low-g Accelerometer
PDF  98 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

FXLS8964AF 数据表(HTML) 60 Page - NXP Semiconductors

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NXP Semiconductors
FXLS8964AF
3-Axis Low-g Accelerometer
FXLS8964AF
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2020. All rights reserved.
Objective data sheet
Rev. 2 — 30 October 2020
60 / 98
BUF_CONFIG2. The same functions used to enter SLEEP are also used to exit this
mode when activity is detected with the exception of the SRC_BUF event flag, which can
only be used to prevent/delay a transition from WAKE to SLEEP if the host system is
reading data from the buffer (and clearing SRC_BUF). A transition from SLEEP to WAKE
mode occurs as soon as one of the enabled detection events becomes active. Refer to
Table 69 for the corresponding Interrupt event sources.
Table 64. ASLP_COUNT_LSB register (address 1Eh) bit allocation
Bit
7
6
5
4
3
2
1
0
Name
ASLP_COUNT[7:0]
Reset
0
0
0
0
0
0
0
0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 65. ASLP_COUNT_LSB register (address 1Eh) bit description
Field
Description
7:0
ASLP_COUNT [7:0]
LSB of the 12-bit unsigned count value used for inactivity detection. The counter period is
determined by the selected WAKE mode ODR.
Table 66. ASLP_COUNT_MSB register (address 1Fh) bit allocation
Bit
7
6
5
4
3
2
1
0
Name
—
—
—
—
ASLP_COUNT[11:8]
Reset
0
0
0
0
0
0
0
0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 67. ASLP_COUNT_MSB register (address 1Fh) bit description
Field
Description
3:0
ASLP_COUNT [11:8]
MSB (nibble) of the 12-bit unsigned count value used for inactivity detection. The counter period is
determined by the selected WAKE mode ODR.
Table 68. ASLP_COUNT timer period
WAKE mode ODR (Hz)
WAKE mode
ODR Period (ms)
ASLP_COUNT Period (ms)
Max Inactivity Time (s)
3200
0.3125
0.3125
1.28
1600
0.625
0.625
2.56
800
1.25
1.25
5.12
400
2.5
2.5
10.24
200
5
5
20.48
100
10
10
40.96
50
20
20
81.92



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