MCP47FVB01 datasheet(35/92 Pages) MICROCHIP

35 / 92 page

 2015 Microchip Technology Inc.

DS20005405A-page 35

MCP47FVBXX

Control register. Each DAC has two bits to control the

Power-Down state of the DAC. This register is for the

volatile memory locations. The width of this register is

2 times the number of DACs for the device.

POWER-DOWN CONTROL REGISTER (ADDRESS 09h)

U-0

R/W-0 R/W-0 R/W-0 R/W-0

Single

—

—(1)

—(1) PB0B PB0A

Dual

—

PB1B PB1A PB0B PB0A

bit 15

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

= Single-channel device

= Dual-channel device

Single

Dual

bit 15-2

bit 15-4

Unimplemented:

Read as ‘0’

bit 1-0

bit 3-0

PBxB-PBxA:

DAC Power-Down Control bits(2)

= Powered Down - VOUT is open circuit.

= Powered Down - VOUT is loaded with a 100 k resistor to ground.

= Powered Down - VOUT is loaded with a 1 k resistor to ground.

= Normal Operation (Not powered-down).

Note 1:

Unimplemented bit, read as ‘0’.

See Table 5-5 and Figure 5-10 for more details.

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