MCP47FVB01 datasheet(55/92 Pages) MICROCHIP

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DS20005405A-page 55

MCP47FVBXX

7.2

Read Command

(Normal and High-Voltage)

Read commands are used to transfer data from the

specified memory location (to the Host controller).

The Read command formats include:

• Single Read

- Single Memory Address

- Last Memory Address Accessed

• Continuous Reads

The MCP47FVBXX retains the last Device Memory

Address that it has received. This means the

MCP47FVBXX does not corrupt the Device Memory

Address after Repeated Start or Stop conditions.

7.2.1

SINGLE READ

The Read command format writes two bytes, the Con-

trol byte and the Read command byte (desired memory

address and the Read command), and then has a

Restart condition. Then a 2nd Control byte is transmit-

ted, but this control byte indicates a I2C read operation

(R/W bit = ‘1’).

7.2.1.1

Single Memory Address

Figure 7-4 shows the sequence for reading a specified

memory address.

7.2.1.2

Last Memory Address Accessed

Figure 7-5 shows the waveforms for a single read of

the last memory location accessed.

7.2.2

CONTINUOUS READS

Continuous reads allows the device’s memory to be

read quickly and are possible to all memory locations.

Figure 7-7 shows the sequence for three continuous

reads.

For continuous reads, instead of transmitting a Stop or

Restart condition after the data transfer, the master

continually reads the data byte. The sequence ends

with the master Not Acknowledging and then sending a

Stop or Restart.

7.2.3

IGNORING AN I2C TRANSMISSION

AND “FALLING OFF” THE BUS

The MCP47FVBXX expects to receive complete, valid

I2C commands and will assume any command not

defined as a valid command is due to a bus corruption,

thus entering a passive high condition on the SDA sig-

nal. All signals will be ignored until the next valid Start

condition and Control Byte are received.

Note 1:

During device communication, if the

Device Address/Command combination

is invalid or an unimplemented Address is

specified, then the MCP47FVBXX will

NACK that byte. To reset the I2C state

machine, the I2C communication must

detect a Start bit.

If the LAT pin is High (VIH), reads of the

volatile DAC register read the output

value, not the internal register.

The Read commands operate the same

regardless of the state of the High-

Voltage Command (HVC) signal.

High Voltage Command support allows

I2C signal voltage compatibility with

MCP47FEBXX devices.

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