MCP47FVB01 datasheet(41/92 Pages) MICROCHIP

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DS20005405A-page 41

MCP47FVBXX

5.3.2

OUTPUT VOLTAGE

The volatile DAC register values, along with the

device’s configuration bits, control the analog VOUT

voltage. The volatile DAC register’s value is unsigned

binary. The formula for the output voltage is provided in

Equation 5-2. Table 5-3 shows examples of volatile

DAC register values and the corresponding theoretical

VOUT voltage for the MCP47FVBXX devices.

EQUATION 5-2:

CALCULATING OUTPUT

VOLTAGE (VOUT)

The following events update the DAC register value

and therefore the analog voltage output (VOUT):

• Power-on Reset

• Brown-out Reset

•I2C Write Command, Falling edge of the acknowl-

edge pulse of the last write command byte

•I2C General Call Reset command, Output is

updated with POR data.

Next, the VOUT voltage will start driving to the new

value after the event has occurred.

5.3.3

STEP VOLTAGE (VS)

The Step Voltage is dependent on the device resolution

and the calculated output voltage range. One LSb is

defined as the ideal voltage difference between two

successive codes. The step voltage can easily be cal-

culated by using Equation 5-3 (DAC register value is

equal to 1). Theoretical Step Voltages are shown in

Table 5-2 for several VREF voltages.

EQUATION 5-3:

VS CALCULATION

TABLE 5-2:

THEORETICAL STEP

VOLTAGE (VS)

(1)

Note:

When Gain = 2 (VRL = VREF),

if VREF > VDD / 2, the VOUT voltage will be

limited to VDD. So if VREF = VDD, then the

VOUT voltage will not change for volatile

DAC register values mid-scale and greater,

since the op amp is at full-scale output.

Where:

# Resistors in R-Ladder = 4096 (MCP47FVB2X)

1024 (MCP47FVB1X)

256 (MCP47FVB0X)

OUT

DAC Register Value



# Resistor in Resistor Ladder

----------------------------------------------------------------------Gain



VREF

5.0

2.7

1.8

1.5

1.0

1.22mV

659uV

439uV

366uV

244uV 12-bit

4.88mV 2.64mV 1.76mV 1.46mV

977uV 10-bit

19.5mV 10.5mV 7.03mV 5.86mV 3.91mV 8-bit

Note 1:

When Gain = 1x, VFS = VRL, and VZS = 0V.

Where:

# Resistors in R-Ladder = 4096 (12-bit)

1024 (10-bit)

256 (8-bit)

# Resistor in Resistor Ladder

----------------------------------------------------------------------Gain



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