MCP47FVB01 datasheet(83/92 Pages) MICROCHIP

83 / 92 page

 2015 Microchip Technology Inc.

DS20005405A-page 83

MCP47FVBXX

APPENDIX C:

TERMINOLOGY

C.1

Resolution

The resolution is the number of DAC output states that

divide the full-scale range. For the 12-bit DAC, the

resolution is 212, meaning the DAC code ranges from

0 to 4095.

C.2

Least Significant Bit (LSb)

This is the voltage difference between two successive

codes. For a given output voltage range, it is divided by

the resolution of the device (Equation C-1). The range

may be VDD (or VREF) to VSS (ideal), the DAC register

codes across the linear range of the output driver

(Measured 1), or full-scale to zero-scale (Measured 2).

EQUATION C-1:

LSb VOLTAGE

CALCULATION

C.3

Monotonic Operation

Monotonic operation means that the device’s output

voltage (VOUT) increases with every 1 code step (LSb)

increment (from VSS to the DAC’s reference voltage

(VDD or VREF)).

FIGURE C-1:

VW (VOUT).

Note:

When there are 2N resistors in the resistor

ladder and 2N tap points, the full scale

DAC register code is resistor element

(1 LSb) from the source reference voltage

(VDD or VREF).

VLSb(Measured) =

VOUT(@4000) - VOUT(@100)

(4000 - 100)

2N = 4096 (MCP47FVB2x)

= 1024 (MCP47FVB1x)

= 256 (MCP47FVB0x)

Ideal

VLSb(IDEAL) =

VDD

VREF

Measured 1

VLSb =

VOUT(@FS) - VOUT(@ZS)

2N - 1

Measured 2

40h

3Fh

3Eh

03h

02h

01h

00h

Voltage (VW ~= VOUT)

VW (@ tap)

VS0

VS1

VS3

VS63

VS64

VW =

VSn + VZS(@ Tap 0)

n = 0

n = ?

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