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ZLP12840 数据表(PDF) 16 Page - Zilog, Inc. |
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ZLP12840 数据表(HTML) 16 Page - Zilog, Inc. |
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16 / 58 page ![]() PS024406-0106 P R E L I M I N A R Y Pin Description ZLP12840 OTP MCU Product Specification 5 Pin Description Figure 2 details the pin configuration of the ZLP12840 device in the 20-pin PDIP, SOIC, and SSOP packages. Table 3 identifies the functions and signal directions of each pin within the 20-pin PDIP, SOIC, and SSOP packages sequentially by pin. Figure 2. ZLP12840 MCU 20-Pin PDIP/SOIC/SSOP Pin Configuration Table 3. ZLP12840 MCU 20-Pin PDIP/SOIC/SSOP Sequential Pin Identification Pin # Symbol Function Direction 1 P25 Port 2, bit 5 Input/Output 2 P26 Port 2, bit 6 Input/Output 3 P27 Port 2, bit 7 Input/Output 4 P07 Port 0, bit 7 Input/Output 5VDD Power Supply 6 XTAL2 Crystal oscillator Output 7 XTAL1 Crystal oscillator Input 8 P31 Port 3, bit 1 Input 9 P32 Port 3, bit 2 Input 10 P33 Port 3, bit 3 Input 11 P34 Port 3, bit 4 Output 12 P36 Port 3, bit 6 Output Note: When the Port 0 high-nibble pull-up option is enabled and the P30 input is Low, current flows through the pull-up to Ground. P25 P26 P27 P07 VDD XTAL2 XTAL1 P31 P32 P33 P24 P23 P22 P21 P20 VSS P01 P00/P30 P36 P34 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 20-Pin PDIP SOIC SSOP |
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