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ZLP12840 数据表(PDF) 48 Page - Zilog, Inc. |
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ZLP12840 数据表(HTML) 48 Page - Zilog, Inc. |
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48 / 58 page ![]() PS024406-0106 P R E L I M I N A R Y Register Pointer Register ZLP12840 OTP MCU Product Specification 37 Register Pointer Register The upper nibble of the register pointer (see Table 17) selects which working register group, of 16 bytes in the register file, is accessed out of the possible 256. The lower nibble selects the expanded register file bank and, in the case of the Crimzon ZLP12840 MCU family, banks 0, 1, 2, 3, F, and D are implemented. A ð¸ in the lower nibble allows the normal register file (Bank 0) to be addressed. Any other value from ðï¸ to ðÚ¸ exchanges the lower 16 registers to an expanded register bank. See Table 17. Table 17. Register Pointer Register (RP) Bit 7 6 5 4 3 2 1 0 Field Working Register Group Pointer Register Bank Pointer Reset 0 0 00 0 0 00 R/W R/W R/W R/W R/W R/W R/W R/W R/W Address Bank Independent: FDh; Linear 0FDh Bit Position Value Description [7:4] 0hFh Working Register Group Pointer Determines which 16-byte working group is addressed. [3:0] 0hFh Register Bank Pointer Determines which bank is active. |
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