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ZLP12840 数据表(PDF) 40 Page - Zilog, Inc. |
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ZLP12840 数据表(HTML) 40 Page - Zilog, Inc. |
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40 / 58 page ![]() PS024406-0106 P R E L I M I N A R Y Register File ZLP12840 OTP MCU Product Specification 29 Register File This device features 1056 bytes of register file space, organized in 256-byte banks. Bank 0 contains 237 bytes of RAM addressed as general-purpose registers, 4 port addresses (of which one is reserved), and 16 control register addresses. Banks 1, 2, and 3 each contain 256 general-purpose register bytes. Banks D and F each contain 16 addresses for control registers. All other banks are reserved and must not be selected. The current bank is selected for 8-bit direct or indirect addressing by writing Register Pointer bits RP[3:0]. In the current bank, a 16-byte working register group (addressed as R0R15) is selected by writing RP[7:4]. A working register operand requires only 4 bits of program memory. There are 16 working register groups per bank. See Figure 9 on page 31 and Figure 10 on page 32. Figure 8. Program/Constant Memory Map (128KB Device) Program IRQ 05 or 000Ch (Reset) Page 0 Vectors Constants Only Page 1 0000h = 16-bit Address (In Page) {0, 0000h} = {PMPR[0], 16-bit address} (LDC, LDCI Only) Not to Scale Constants {1, 0000h} {1, FFFFh} {0, 0000h} {0, FFFFh} FFFFh 0000h FFFFh |
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