ZLP12840 datasheet(41/58 Pages) ZILOG

41 / 58 page

PS024406-0106

P R E L I M I N A R Y

ZLP12840 OTP MCU

Product Specification

8-bit addresses in the range F0hFFh (and the equivalent 4-bit addresses) are bank-inde-

pendent, meaning they always access the control registers in Bank 0, regardless of the

RP[3:0] value. Addresses in the range 00h03h always access the Bank 0 Port registers

unless Bank D or F is selected. (Port 01h is not implemented in this device.) When Bank D

or F is selected, addresses 10hEFh access the Bank 0 general-purpose registers.

The LDX and LDXI instructions or indirect addressing can be used to access the Bank 1

3 registers not accessible by 8-bit or working register addresses (12-bit addresses 100h

103h, 1F0h1FFh, 200h203h, 2F0h2FFh, 300h303h, and 3F0h3FFh). See Linear

Memory Addressing on page 33.

Stack

The Stack Pointer register (SPL) is Bank 0 register FFh. Operations that use the stack

pointer always addresses Bank 0, regardless of the RP[3:0] setting. For details about the

stack, see the Z8 LXM CPU Core User Manual (UM0183).

This device does not use a stack pointer high byte. Bank 0 register FEh can be used to

store user data, see User Data Register on page 38.

ZLP12840 数据表(PDF) 41 Page - Zilog, Inc.