ZLP12840 datasheet(32/58 Pages) ZILOG

部件名	ZLP12840

功能描述	Crimzon-TM Infrared Microcontrollers ZLP12840 OTP MCU with Learning Amplification

PDF	58 Pages

Scroll/Zoom	100%

制造商	ZILOG [Zilog, Inc.]

网页	http://www.zilog.com

标志

32 / 58 page

PS024406-0106

P R E L I M I N A R Y

Port 0 Mode Register

ZLP12840 OTP MCU

Product Specification

Port 0 Mode Register

The Port 0 Mode Register determines the I/O direction of Port 0. The Port 0 direction is

nibble-programmable. Bit 6 controls the upper nibble of Port 0, bits [7:3]. Bit 0 controls

the lower nibble of Port 0, bits [3:0]. See Table 11.

Only P00, P01, and P07 are available on Crimzon ZLP12840 MCU 20-pin configura-

tions.

Table 10. Port 0 Mode Register (P01M)

Bit

Field

Reserved

P07:P04 Mode

Reserved

P03:P00 Mode

Reset

XXXX

R/W

Address

Bank Independent: F8h; Linear: 0F8h

Bit

Position

Value Description

ReservedWrites have no effect. Reads 1b.

[6]

P07:P04 Mode

Output.

Input.

[5:1]

ReservedWrites have no effect. Reads 11111b.

[0]

P00:P03 Mode

Output.

Input.

Note:

ZLP12840 数据表(PDF) 32 Page - Zilog, Inc.

ZLP12840 数据表(HTML) 32 Page - Zilog, Inc.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58

数据表下载