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ADP5056ACCZ-R7 数据表(PDF) 21 Page - Analog Devices

部件名 ADP5056ACCZ-R7
功能描述  Triple Buck Regulator Integrated Power Solution
PDF  31 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP5056ACCZ-R7 数据表(HTML) 21 Page - Analog Devices

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Data Sheet
ADP5056
Rev. 0 | Page 21 of 31
APPLICATIONS INFORMATION
PROGRAMMING THE ADJUSTABLE OUTPUT
VOLTAGE
The output voltage of the ADP5056 is externally set by a resistive
voltage divider from the output voltage to the FBx pin. To limit
the degradation of the output voltage accuracy due to feedback
bias current, ensure that the bottom resistor in the divider is not
too large. A value of less than 50 kΩ is recommended.
The equation for the output voltage setting is
VOUT = VREF × (1 + (RTOP/RBOT))
where:
VOUT is the output voltage.
VREF is the feedback reference voltage, 0.6 V for Channel 1 to
Channel 3.
RTOP is the feedback resistor from VOUT to FBx.
RBOT is the feedback resistor from FBx to ground.
VOLTAGE CONVERSION LIMITATIONS
For a given input voltage, upper and lower limitations on the
output voltage exist due to the minimum on time and the
minimum off time.
The minimum on time limits the output voltage for a given
input voltage and switching frequency. The minimum on time
for Channel 1 to Channel 3 is 50 ns (maximum).
In FPWM mode, Channel 1 and Channel 2 can skip the switching
pulses to maintain the output regulation when the minimum on
time limit is exceeded. Careful selection of switching frequency is
required to avoid this condition.
To calculate the minimum output voltage in CCM for a given
input voltage and switching frequency, use the following
equation:
VOUT_MIN = VIN × tMIN_ON × fSW − (RDSON_HS − RDSON_LS) ×
IOUT_MIN × tMIN_ON × fSW − (RDSON_LS + RL) × IOUT_MIN
(1)
where:
VOUT_MIN is the minimum output voltage.
VIN is the input voltage.
tMIN_ON is the minimum on time.
fSW is the switching frequency.
RDSON_HS is the on resistance of the high-side MOSFET.
RDSON_LS is the on resistance of the low-side MOSFET.
IOUT_MIN is the minimum output current.
RL is the resistance of the output inductor.
The maximum output voltage for a given input voltage and
switching frequency is limited by the minimum off time and the
maximum duty cycle.
The maximum output voltage for a given input voltage and
switching frequency can be calculated using the following
equation:
VOUT_MAX = VIN × (1 − tMIN_OFF × fSW) − (RDSON_HS − RDSON_LS) ×
IOUT_MAX × (1 − tMIN_OFF × fSW) − (RDSON_LS + RL) × IOUT_MAX (2)
where:
tMIN_OFF is the minimum off time.
IOUT_MAX is the maximum output current.
As shown in Equation 1 and Equation 2, reducing the switching
frequency eases the minimum on time and off time limitations.
CURRENT-LIMIT SETTING
The ADP5056 has two selectable current-limit thresholds for
Channel 1, Channel 2, and Channel 3. Ensure that the selected
current-limit value is larger than the peak current of the inductor
(IPEAK) for the current-limit configuration for all channels.
SOFT START SETTING
The buck regulators in the ADP5056 include soft start circuitry
that ramps the output voltage in a controlled manner during
startup, thereby limiting the inrush current. To set the soft start
time to a value of 2.2 ms or 17.3 ms, connect a resistor from the
CFG2 pin to ground (see the Soft Start section).
INDUCTOR SELECTION
The inductor value is determined by the switching frequency,
input voltage, output voltage, and inductor ripple current. Using
a small inductor value yields faster transient response but may
degrade efficiency due to the larger inductor ripple current.
Using a large inductor value yields a smaller ripple current and
improved efficiency but results in slower transient response.
Thus, a trade-off must be made between transient response and
efficiency. As a guideline, the inductor peak-to-peak ripple
current, ΔIL, is typically set to a value from 30% to 40% of the
maximum load current. Use the following equation to calculate
the inductor value:
L = ((VIN − VOUT) × D)/(ΔIL × fSW)
where:
VOUT is the output voltage.
D is the duty cycle (D = VOUT/VIN).
ΔIL is the inductor ripple current.
The ADP5056 has internal slope compensation in the current
loop to prevent subharmonic oscillations when the duty cycle is
greater than 50%.
Use the following equation to calculate the peak inductor
current:
IPEAK = IOUT + (ΔIL/2)
The saturation current of the inductor must be larger than the
peak inductor current. For ferrite core inductors with a fast
saturation characteristic, ensure that the saturation current rating



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