Triple Buck Regulator

Integrated Power Solution

Data Sheet

ADP5056

Rev. 0

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FEATURES

Wide input voltage range: 2.75 V to 18 V

Bias input voltage range: 4.5 V to 18 V

Operation up to 150°C junction temperature

−0.62% to +0.69% feedback voltage accuracy (−40°C to +125°C

junction temperature)

Channel 1 and Channel 2: 7 A synchronous buck regulator

(9.4 A minimum valley current limit)

Channel 1 and Channel 2: 14 A output in parallel operation

Channel 3: 3 A synchronous buck regulator (4.2 A minimum

valley current limit)

250 kHz to 2500 kHz adjustable switching frequency

External compensation for fast load transient response

Precision enable pin with 0.615 V accurate reference voltage

Programmable power-up and power-down sequence

Selective FPWM/PSM mode selection

Frequency synchronization input or output

Power-good flag for three channels

Active output discharge switch

UVLO, overcurrent protection, and TSD protection

43-terminal, 5 mm × 5.5 mm LGA package

APPLICATIONS

Small cell base stations

Field programmable gate array (FPGA) and processor

applications

Security and surveillance

Medical applications

TYPICAL APPLICATION CIRCUIT

L1

BST1

SW1

PGND

C4

C3

VOUT1

FB1

VREG

C1

GND

L2

BST2

SW2

PGND

C7

C6

VOUT2

FB2

EN1

PVIN1

C2

2.75V

TO 18.0V

PVIN2

C5

COMP1

COMP2

EN2

VBIAS

INT

L3

BST3

SW3

PGND

C10

C9

VOUT3

FB3

PVIN3

C8

COMP3

EN3

RT

CFG1

CFG2

OSC

SYNC/MODE

TO 18.0V)

RAMP1

PWRGD

RAMP2

RAMP3

LOGIC

GND

GND

CHANNEL 3

3A BUCK

CHANNEL 2

7A BUCK

CHANNEL 1

7A BUCK

Figure 1.

GENERAL DESCRIPTION

The ADP5056 combines three high performance buck regulators

in a 43-terminal land grid array (LGA) package that meets the

demanding performance and board space requirements. The

device enables direct connection to high input voltages up to

18 V with no preregulators.

All channels integrate both high-side and low-side power metal-

oxide semiconductor field effect transistors (MOSFETs) to achieve

an efficiency optimized solution. Channel 1 and Channel 2

deliver a programmable output current of 3.5 A or 7 A, or

provide a single output with up to 14 A of current in parallel

operation. Channel 3 delivers a programmable output current

of 1.5 A or 3 A.

The switching frequency of the ADP5056 can be programmed

or synchronized to an external clock. The ADP5056 contains an

enable pin (ENx) on each channel for easy power-up sequencing

or adjustable undervoltage lockout (UVLO) threshold.

The ADP5056 integrates start-up/shutdown sequence control,

forced pulse-width modulation/power saving mode (FPWM/PSM)

selection, an output discharge switch, and a power-good signal.

The ADP5056 is rated at −40°C to +150°C junction temperature.

Note that throughout this data sheet, multifunction pins, such

as SYNC/MODE, are referred to either by the entire pin name

or by a single function of the pin, for example, SYNC, when

only that function is relevant.