EDB8164B4PR-1DATF-R datasheet(82/152 Pages) MICRON

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Table 52: Data Calibration Pattern Description

Pattern

MR#

Bit Time

Description

Pattern A

MR32

Reads to MR32 return DQ calibration pattern A

Pattern B

MR40

Reads to MR40 return DQ calibration pattern B

MODE REGISTER WRITE Command

The MODE REGISTER WRITE (MRW) command is used to write configuration data to

the mode registers. The MRW command is initiated with CS_n LOW, CA0 LOW, CA1

LOW, CA2 LOW, and CA3 LOW at the rising edge of the clock. The mode register is selec-

ted by CA1f–CA0f, CA9r–CA4r. The data to be written to the mode register is contained

in CA9f–CA2f. The MRW command period is defined by tMRW. A MRW command to

read-only registers has no impact on the functionality of the device.

MRW can be issued only when all banks are in the idle precharge state. One method of

ensuring that the banks are in this state is to issue a PRECHARGE ALL command.

Figure 54: MODE REGISTER WRITE Timing – RL = 3, tMRW = 5

Notes:

1. At time Ty, the device is in the idle state.

2. Only the NOP command is supported during tMRW.

Table 53: Truth Table for MRR and MRW

Current State

Command

Intermediate State

Next State

All banks idle

MRR

Reading mode register, all banks idle

All banks idle

MRW

Writing mode register, all banks idle

All banks idle

MRW (RESET)

Resetting, device auto initialization

All banks idle

Bank(s) active

MRR

Reading mode register, bank(s) active

Bank(s) active

MRW

Not allowed

MRW (RESET)

Not allowed

MRW RESET Command

The MRW RESET command brings the device to the device auto initialization (reset-

ting) state in the power-on initialization sequence (see step 2. of the RESET Command

216-Ball and 220-Ball, Dual-Channel LPDDR2 SDRAM

MODE REGISTER WRITE Command

09005aef85eb530a

216b_220b_2ch_2e0e_embedded_lpddr2.pdf – Rev. F 08 /16 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

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