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STM32WLE4JC 数据表(PDF) 41 Page - STMicroelectronics |
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STM32WLE4JC 数据表(HTML) 41 Page - STMicroelectronics |
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41 / 146 page ![]() DS13105 Rev 9 41/146 STM32WLE5/E4xx Functional overview 48 3.18.3 VBAT battery voltage monitoring This embedded hardware feature allows the application to measure the VBAT(a) battery voltage using the ADC VIN[14] input channel. As VBAT may be higher than VDDA, and thus outside the ADC input range, the VBAT pin is internally connected to a bridge divider by three. As a consequence, the converted digital value is one third the VBAT voltage. 3.19 Digital-to-analog converter (DAC) The 1-channel 12-bit buffered DAC converts a digital value into an analog voltage available on the channel output. The architecture of each channel is based on an integrated resistor string and an inverting amplifier. The digital circuitry is common for both channels. DAC main features: • 1 DAC output channel • 8-bit or 12-bit output mode • buffer offset calibration (factory and user trimming) • left or right data alignment in 12-bit mode • synchronized update capability • noise-wave generation • triangular-wave generation • independent or simultaneous conversion for DAC channels • DMA capability for either DAC channel • triggering with timer events, synchronized with DMA • triggering with external events Sample-and-hold low-power mode, with internal or external capacitor 3.20 Voltage reference buffer (VREFBUF) The devices embed a voltage reference buffer that can be used as voltage reference for ADC, and also as voltage reference for external components through the VREF+ pin. VREFBUF supports two voltages: 2.048 V and 2.5 V. An external voltage reference can be provided through the VREF+ pin when VREFBUF is off. Table 13. Internal voltage reference calibration values Calibration value name Description Memory address VREFINT_CAL Raw data acquired at 30 °C (± 5 °C), VDDA = VREF+ = 3.3 V (± 10 mV) 0x1FFF 75AA - 0x1FFF 75AB a. VDD on STM32WLE5/E4UxYx devices. |
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