PCF8536AT datasheet(56/103 Pages) NXP

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PCA8530

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Product data sheet

Rev. 2 — 25 September 2014

56 of 103

NXP Semiconductors

PCA8530

Automotive 102 x 4 Chip-On-Glass LCD segment driver

Bus interfaces

9.1 Control byte and register selection

After initiating the communication over the bus and sending the slave address (I2C-bus,

see Section 9.2) or subaddress (SPI-bus, see Section 9.3 on page 61), a control byte

follows. The purpose of this byte is to indicate both, the content for the following data

bytes (RAM or command) and to indicate that more control bytes will follow.

Typical sequences could be:

• Slave address/subaddress - control byte - command byte - command byte - command

byte - end

• Slave address/subaddress - control byte - RAM byte - RAM byte - RAM byte - end

• Slave address/subaddress - control byte - command byte - control byte - RAM byte -

end

This allows sending a mixture of RAM and command data in one access or alternatively,

to send just one type of data in one access. In this way, it is possible to configure the

device and then fill the display RAM with little overhead. The display bytes are stored in

the display RAM at the address specified by the data pointer.

Table 42.

Control byte description

Bit

Symbol

Value

Description

7CO

continue bit

last control byte

control bytes continue

6 to 5

RS[1:0]

00, 10

command register

RAM data

unused

4 to 0

unused

Fig 32. Control byte format

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