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PCF8536AT 数据表(PDF) 60 Page - NXP Semiconductors

部件名 PCF8536AT
功能描述  Automotive 102 x 4 Chip-On-Glass LCD segment driver
PDF  103 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

PCF8536AT 数据表(HTML) 60 Page - NXP Semiconductors

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PCA8530
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 2 — 25 September 2014
60 of 103
NXP Semiconductors
PCA8530
Automotive 102 x 4 Chip-On-Glass LCD segment driver
9.2.8 I2C-bus protocol
The I2C-bus protocol is shown in Figure 37. The sequence is initiated with a START
condition (S) from the I2C-bus master which is followed by one of the four PCA8530 slave
addresses available. All PCA8530 with the corresponding SA1 and SA0 level
acknowledge in parallel to the slave address, but all PCA8530 with the alternative SA1
and SA0 levels ignore the whole I2C-bus transfer.
After acknowledgement, a control byte follows which defines if the next byte is RAM or
command information. The control byte (see Table 42 on page 56) also defines whether
the next byte is a control byte or further RAM or command data.
For a temperature readout (see Section 8.10.4.1 on page 40), the R/W bit must be logic 1.
The next data byte following is provided by the PCA8530 as shown in Figure 38.
Fig 37. I2C-bus protocol - write mode
Fig 38. I2C-bus protocol - read mode



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