PCF8536AT datasheet(75/103 Pages) NXP

75 / 103 page

PCA8530

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Product data sheet

Rev. 2 — 25 September 2014

75 of 103

NXP Semiconductors

PCA8530

Automotive 102 x 4 Chip-On-Glass LCD segment driver

14.3 SPI-bus timing characteristics

[1]

No load value; bus will be held up by bus capacitance; use RC time constant with application values.

Fig 52. I2C-bus timing

Table 51.

SPI-bus timing characteristics

VDD1, VDD2, VDD3 = 2.5 V to 5.5 V; VSS1 = 0 V; VLCD = 4.0 V to 12.0 V; Tamb = 40 C to +105 C; unless otherwise specified.

All timing values are valid within the operating supply voltage and ambient temperature range and are referenced to VIL and

VIH with an input voltage swing of VSS1 to VDD1.

Symbol

Parameter

Conditions

Min

Max

Unit

Pin SCL

fclk(SCL)

SCL clock frequency

3.0

MHz

tSCL

SCL time

333

tclk(H)

clock HIGH time

100

tclk(L)

clock LOW time

150

rise time

for SCL signal

100

fall time

for SCL signal

100

Pin CE

tsu(CE_N)

CE_N set-up time

th(CE_N)

CE_N hold time

trec(CE_N)

CE_N recovery time

Pin SDI/SDAIN

tsu

set-up time

set-up time for SDI data

hold time

hold time for SDI data

Pin SDO

td(R)SDO

SDO read delay time

CL = 100 pF

150

tdis(SDO)

SDO disable time

[1] -50

tt(SDI-SDO)

transition time from SDI to

SDO

to avoid bus conflict

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