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PCF8536AT 数据表(PDF) 7 Page - NXP Semiconductors |
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PCF8536AT 数据表(HTML) 7 Page - NXP Semiconductors |
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7 / 103 page  PCA8530 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 2 — 25 September 2014 7 of 103 NXP Semiconductors PCA8530 Automotive 102 x 4 Chip-On-Glass LCD segment driver [1] The substrate (rear side of the die) is connected to VSS1 and should be electrically isolated. [2] If pin OSC is tied to VSS1, CLK is the output pin of the internal oscillator. If pin OSC is tied to VDD1, CLK is the input pin for the external oscillator. [3] If cascading is not used, pin must be left floating; for cascading see Section 15.2 on page 80. Bus-related pins SPI-bus I2C-bus IFS 66, 67 input interface selector input • connect to VSS1 • connect to VDD1 SA0 70, 71 input unused; • connect to VSS1 slave address selector; • connect to VSS1 for logic 0 • connect to VDD1 for logic 1 SA1 72, 73 input CE 91, 92 input chip enable input (active LOW) unused; • connect to VDD1 SDI/SDAIN 104 to 106 input SPI-bus data input I2C-bus serial data input SDAOUT 107 to 111 output unused; • must be connected to VSS1 serial data output SDO 112, 113 output SPI serial data output unused; • must be left open SCL 114 to 116 input serial clock input serial clock input Table 4. Pin description …continued Input or input/output pins must always be at a defined level (VSS or VDD) unless otherwise specified. Symbol Pin Type Description |
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