LTM4686BEVPBF datasheet(27/130 Pages) AD

27 / 130 page

LTM4686B

Rev. 0

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OPERATION

Soliciting the device for the revisions of PMBus specifica-

tions that it supports (Part I: Rev. 1.2; Part II: Rev 1.2).

Soliciting the device for the identification of the manu-

facturer of the LTM4686B, “LTC” (MFR_ID) and the

manufacturer code representing the LTM4686B and

revision, 0x477X (MFR_SPECIAL_ID).

Soliciting the device for its part number, "LTM4686"

(MFR_MODEL).*

Soliciting the module for its serial number

(MFR_SERIAL).

The digital status of the LTM4686B’s I/O pads and

validity of the ADC (MFR_PADS) and WP pin status

(MFR_COMMON[0]).

The following list indicates other aspects of the

LTM4686B relating to power system management and

power sequencing that are configurable by I2C commu-

nications—provided the state of the WP (write protect)

pin and the WRITE_PROTECT register value permit the

I2C writes—and by EEPROM settings:

Providing multiple means to read/write data directly

to a particular channel of the LTM4686B by assign-

ing additional slave address for channels 0 and 1

(MFR_RAIL_ADDRESSn), the benefit of which is that

it reduces page command usage and associated I2C

traffic. It also facilitates altering the same register of

multiple LTM4686B in unison without invoking the

PMBus group command protocol. See also PAGE_

PLUS_READ and PAGE_PLUS_WRITE.

Configuring the output voltage to be on or off by

means other than the RUNn pin (ON_OFF_CONFIGn[3],

OPERATION commands).

Configuring whether the LTM4686B performs a

CLEAR_FAULTS command upon itself when either

RUNn pin toggles from logic low to logic high.

(MFR_CONFIG_ALL[0]).

Configuring whether the LTM4686B pulls RUNn logic

low when the LTM4686B is commanded off by other

means (MFR_CHAN_CONFIGn[4]).

Configuring the response of the LTM4686B when it is

commanded to turn on its output prior to the completion

of processing TOFF_DELAYn and TOFF_FALLn power-

down sequencing (MFR_CHAN_CONFIGn[3]).

Configuring whether the LTM4686B’s output

is disabled when SHARE_CLK is held low

(MFR_CHAN_CONFIGn[2]).

Configuring whether the ALERT pin is pulled low

when GPIOn is pulled low by external stimulus

(MFR_CHAN_CONFIGn[1]).

Setting the value of the MFR_IIN_OFFSETn registers,

representing an estimate of the current drawn by the

SVIN pin. The SVIN pin current is not measured by the

LTM4686B but the MFR_IIN_OFFSETn is used in com-

puting and reporting channel and total module input

currents (MFR_READ_IINn, READ_IIN).

Three words (six bytes) of the LTM4686B’s EEPROM

that are available for storing user data. (USER_

DATA_03n, USER_DATA_04).

Invoking or releasing several levels of I2C write protec-

tion (WRITE_PROTECT).

Configuring the bus timeout for 255ms (MFR_CONFIG_

ALL[3] = 1b) if the host needs more time to complete

I2C transactions.

Determining whether the user-editable RAM register

values are identical to the contents of the user NVM

(MFR_COMPARE_USER_ALL).

Setting the programmable output voltage range of VOUT

to a narrower range (0.5V to 2.75V) in order to achieve

a higher resolution of VOUT adjustment than is avail-

able by default (MFR_PWM_MODEn[1]). MFR_PWM_

MODE cannot be changed on the fly; switching action

must be off. Note that altering the VOUT range alters

the gain of the control loop and may therefore require

loop compensation to be adjusted.

Altering the temperature coefficient of the

LTM4686B’s current sensing elements, if needed

* The MFR_MODEL value is “LTM4686 ”. The value consists of 8 ASCII characters and the last

character is a blank space punctuation character (“ ”), i.e., ASCII code 0x20 or 32d.

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