LTM4686BEVPBF datasheet(16/130 Pages) AD

16 / 130 page

LTM4686B

Rev. 0

For more information www.analog.com

PIN FUNCTIONS

UV warning and fault thresholds are dictated at SVIN

power-up according to the LTM4686B’s NVM contents,

in precisely the same fashion that the VOUT0CFG and

VTRIM0CFG pins affect the respective settings of VOUT0/

Channel 0. (See VOUT0CFG, VTRIM0CFG and the Applications

Information section.) Minimize capacitance—especially

when the pin is left open—to assure accurate detection

of the pin state. Note that use of RCONFIGs* on VOUT1CFG/

VTRIM1CFG can affect the VOUT1 range setting (MFR_

PWM_MODE1[1]) and loop gain.

FSWPHCFG (H2): Switching Frequency, Channel Phase-

Interleaving Angle and Phase Relationship to SYNC

Configuration Pin. If this pin is left open—or, if the

LTM4686B is configured to ignore pin-strap (RCONFIG)

resistors, i.e., MFR_CONFIG_ALL[6] = 1b—then the

LTM4686B’s switching frequency (FREQUENCY_SWITCH)

and channel phase relationships (with respect to the

SYNC clock; MFR_PWM_CONFIG[2:0]) are dictated at

SVIN power-up according to the LTM4686B’s NVM con-

tents. Default factory values are: 1MHz operation; Channel

0 at 0°; and Channel 1 at 180° (convention throughout

this document: a phase angle of 0° means the chan-

nel’s switch node rises coincident with the falling edge

of the SYNC pulse). Connecting a resistor from this pin

to SGND (and using the factory-default NVM setting of

MFR_CONFIG_ALL[6] = 0b) allows a convenient way to

configure multiple LTM4686Bs with identical NVM con-

tents for different switching frequencies of operation and

phase interleaving angle settings of intra- and extra-mod-

ule-paralleled channels—all, without GUI intervention or

the need to “custom pre-program” module NVM contents.

(See the Applications Information section.) Minimize

capacitance—especially when the pin is left open—to

assure accurate detection of the pin state.

VTRIM0CFG (H3): Output Voltage Select Pin for VOUT0, Fine

Setting. Works in combination with VOUT0CFG to affect

the VOUT_COMMAND (and associated output volt-

age monitoring and protection/fault-detection thresh-

olds) of Channel 0, at SVIN power-up. (See VOUT0CFG

and the Applications Information section.) Minimize

capacitance—especially when the pin is left open—to

assure accurate detection of the pin state. Note that use

of RCONFIGs* on VOUT0CFG/VTRIM0CFG can affect the VOUT0

range setting (MFR_PWM_MODE0[1]) and loop gain.

VTRIM1CFG (H4): Output Voltage Select Pin for VOUT1, Fine

Setting. Works in combination with VOUT1CFG to affect

the VOUT_COMMAND (and associated output voltage

monitoring and protection/fault-detection thresholds)

of Channel 1, at SVIN power-up. (See VOUT1CFG and the

Applications Information section.) Minimize capaci-

tance—especially when the pin is left open—to assure

accurate detection of the pin state. Note that use of

RCONFIGs* on VOUT1CFG/VTRIM1CFG can affect the VOUT1

range setting (MFR_PWM_MODE1[1]) and loop gain.

SHARE_CLK (H5): Share Clock, Bidirectional Open-Drain

Clock Sharing Pin. Nominally 100kHz. Used for synchro-

nizing the time base between multiple LTM4686Bs (and

any other Analog Devices, Inc. devices with a SHARE_CLK

pin)—to realize well-defined rail sequencing and rail track-

ing. Tie the SHARE_CLK pins of all such devices together;

all devices with a SHARE_CLK pin will synchronize to the

fastest clock. A pull-up resistor to 3.3V is required when

synchronizing the time base between multiple devices. If

synchronizing the time base between multiple devices is

not needed and MFR_CHAN_CONFIGn[2] = 0b, only then

is a pull-up resistor not required.

VOSNS1 (H7): Channel 1 Positive Voltage Sense Input.

Connect VOSNS1 to VOUT1 at the POL. This provides the

feedback signal for Channel 1’s control loop and voltage

supervisor circuits. VOUT1 can regulate up to 3.6V output.

Command VOUT1’s target regulation voltage by serial bus.

Its initial command value at SVIN power-up is dictated

by NVM (nonvolatile memory) contents (factory default:

1.200V)—or, optionally, may be set by configuration

resistors; see VOUT1CFG, VTRIM1CFG and the Applications

Information section.

VOUT1 (J1, K1, L1, M1): Channel 1 Output Voltage.

LTM4686BEVPBF 数据表(PDF) 16 Page - Analog Devices

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