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LTM4686BEVPBF 数据表(PDF) 58 Page - Analog Devices

部件名 LTM4686BEVPBF
功能描述  Ultrathin Dual 14A or Single 28A 關Module Regulator with Digital Power System Management
PDF  130 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

LTM4686BEVPBF 数据表(HTML) 58 Page - Analog Devices

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i.e., contains its finalized configuration, prior to being sol-
dered to the user’s PCB/motherboard—or, if other means
have been provided for altering the LTM4686B’s NVM
contents in the user’s system—then the 3.3V/3.4V pin
on the header is not needed, and a 3-pin header is suf-
ficient to establish GUI communications. The LTM4686B
can be purchased with customized NVM contents; con-
sult factory for details. Alternatively, the NVM contents of
the LTM4686B can be configured in a mass production
environment by designing for it in ICT (in-circuit test),
or by providing a means of applying SVIN while holding
the LTM4686B’s RUN pins low. Communication to the
module must be made possible via the SCL and SDA pins/
nets in all NVM programming scenarios. Recommended
headers are found in Table 9 and Table 10.
The ADI controller/adapter I2C connections are opto-iso-
lated from the PC USB. The 3.3V/3/4V from the controller/
adapter and the LTM4686B VDD33 pin must be driven to
each LTM4686B with a separate PFET or diode, according
to Figure 4 and Figure 5. Only when SVIN is not applied
is it permissible for the VDD33 pins to be electrically in
parallel because the INTVCC LDO is off. The DC1613’s
3.3V current limit is 100mA but typical VDD33 currents are
under 15mA. The VDD33 does back drive the INTVCC pin.
Normally this is not an issue if SVIN is open. The DC2086
is capable of delivering 3.4V at 2A.
Using a 4-pin header in Figure 4 or Figure 5 maximizes
flexibility to alter the LTM4686B’s NVM contents at any
stage of the user’s product development and production
cycles. If the LTM4686B’s NVM is “pre-programmed”,
Table 9. 4-Pin Headers, 2mm Pin-to-Pin Spacing, Gold Flash or Plating, Compatible with DC2086 Cables
MOUNTING
STYLE
INSERTION
ANGLE
INTERFACE STYLE
VENDOR PART NUMBER
PINOUT STYLE (SEE Table 11)
Surface Mount
Vertical
Shrouded and Keyed Header
Hirose
DF3DZ-4P-2V(51)
DF3DZ-4P-2V(50)
DF3Z-4P-2V(50)
Type A
Non Shrouded, Non-Keyed Header
3M
951104-2530-AR-PR Type A and B Supported. Reversible/Not Keyed
Right Angle
Shrouded and Keyed Header
Hirose
DF3DZ-4P-2H(51)
DF3DZ-4P-2H(50)
Type A
Non Shrouded. Cable-to-Header/PCB
Mechanics Yield Keying Effect
FCI
10112684-G03-04ULF Type B. Keying Achieved by PCB Surface
Through-Hole
Vertical
Shrouded and Keyed Header
Hirose
DF3-4P-2DSA(01)
Type A
Non Shrouded, Non-Keyed Header
Harwin M22-2010405
Type A and B Supported. Reversible/Not Keyed
Samtec TMM-104-01-LS
Sullins NRPN041PAEN-RC
Right Angle
Shrouded and Keyed Header
Hirose
DF3-4P-2DS(01)
Type A
Non Shrouded. Cable-to-Header/PCB
Mechanics Yield Keying Effect
Norcomp 27630402RP2
Type B. Keying Achieved by Intentional PCB
Interference
Harwin M22-2030405
Samtec TMM-104-01-L-S-RA
LTM4686B
58
Rev. 0
For more information www.analog.com
APPLICATIONS INFORMATION



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