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AD9510/PCB 数据表(PDF) 30 Page - Analog Devices

部件名 AD9510/PCB
功能描述  1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs
PDF  60 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9510/PCB 数据表(HTML) 30 Page - Analog Devices

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AD9510
Rev. A | Page 30 of 60
Table 14. PLL Prescaler Modes
Mode
(FD = Fixed Divide
DM = Dual Modulus)
Value in 0Ah<4:2>
Divide By
FD
000
1
FD
001
2
P = 2 DM
010
P/P + 1 = 2/3
P = 4 DM
011
P/P + 1 = 4/5
P = 8 DM
100
P/P + 1 = 8/9
P = 16 DM
101
P/P + 1 = 16/17
P = 32 DM
110
P/P + 1 = 32/33
FD
111
3
When using the prescaler in FD mode, the A counter is not
used, and the B counter may need to be bypassed. The DM
prescaler modes set some upper limits on the frequency, which
can be applied to CLK2. See Table 15.
Table 15. Frequency Limits of Each Prescaler Mode
A and B Counters
The AD9510 B counter has a bypass mode (B = 1), which is not
available on the ADF4106. The B counter bypass mode is valid
only when using the prescaler in FD mode. The B counter is
bypassed by writing 1 to the B counter bypass bit (0Ah<6> =
1b). The valid range of the B counter is 3 to 8191. The default
after a reset is 0, which is invalid.
Note that the A counter is not used when the prescaler is in
FD mode.
Note also that the A/B counters have their own reset bit,
which is primarily intended for testing. The A and B counters
can also be reset using the R, A, and B counters’ shared reset bit
(09h<0>).
Determining Values for P, A, B, and R
When operating the AD9510 in a dual-modulus mode, the
input reference frequency, FREF, is related to the VCO output
frequency, FVCO.
FVCO = (FREF/R) × (PB + A) = FREF × N/R
When operating the prescaler in fixed divide mode, the A
counter is not used and the equation simplifies to
FVCO = (FREF/R) × (PB) = FREF × N/R
By using combinations of dual modulus and fixed divide
modes, the AD9510 can achieve values of N all the way down
to N = 1. Table 16 shows how a 10 MHz reference input may be
locked to any integer multiple of N. Note that the same value of
N may be derived in different ways, as illustrated by N = 12.
Mode (DM = Dual Modulus)
CLK2
P = 2 DM (2/3)
<600 MHz
P = 4 DM (4/5)
<1000 MHz
P = 8 DM (8/9)
<1600 MHz
P = 16 DM
<1600 MHz
P = 32 DM
<1600 MHz



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