AD9510SLASHPCB datasheet(56/60 Pages) AD

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AD9510

Rev. A | Page 56 of 60

POWER SUPPLY

The AD9510 requires a 3.3 V ± 5% power supply for VS.

The tables in the Specifications section give the performance

expected from the AD9510 with the power supply voltage

within this range. The absolute maximum range of −0.3 V −

+3.6 V, with respect to GND, must never be exceeded on

the VS pin.

Good engineering practice should be followed in the layout of

power supply traces and the ground plane of the PCB. The

power supply should be bypassed on the PCB with adequate

capacitance (>10 μF). The AD9510 should be bypassed with

adequate capacitors (0.1 μF) at all power pins as close as

possible to the part. The layout of the AD9510 evaluation board

(AD9510/PCB or AD9510-VCO/PCB) is a good example.

The AD9510 is a complex part that is programmed for its

desired operating configuration by on-chip registers. These

registers are not maintained over a shutdown of external power.

This means that the registers can loose their programmed

values if VS is lost long enough for the internal voltages to

collapse. Careful bypassing should protect the part from

memory loss under normal conditions. Nonetheless, it is

important that the VS power supply not become intermittent,

or the AD9510 risks losing its programming.

The internal bias currents of the AD9510 are set by the RSET and

CPRSET resistors. These resistors should be as close as possible to

the values given as conditions in the Specifications section

(RSET = 4.12 kΩ and CPRSET = 5.1 kΩ). These values are standard

1% resistor values, and should be readily obtainable. The bias

currents set by these resistors determine the logic levels and

operating conditions of the internal blocks of the AD9510. The

performance figures given in the Specifications section assume

that these resistor values are used.

The VCP pin is the supply pin for the charge pump (CP). The

voltage at this pin (VCP) may be from VS up to 5.5 V, as required

to match the tuning voltage range of a specific VCO/VCXO.

This voltage must never exceed the absolute maximum of 6 V.

VCP should also never be allowed to be less than −0.3 V below

VS or GND, whichever is lower.

The exposed metal paddle on the AD9510 package is an

electrical connection, as well as a thermal enhancement. For

the device to function properly, the paddle must be properly

attached to ground (GND). The PCB acts as a heat sink for the

AD9510; therefore, this GND connection should provide a

good thermal path to a larger dissipation area, such as a ground

plane on the PCB. See the layout of the AD9510 evaluation

board (AD9510/PCB or AD9510-VCO/PCB) for a good

example.

POWER MANAGEMENT

The power usage of the AD9510 can be managed to use only the

power required for the functions that are being used. Unused

features and circuitry can be powered down to save power. The

following circuit blocks can be powered down, or are powered

down when not selected (see the Register Map and Description

section):

• The PLL section can be powered down if not needed.

• Any of the dividers are powered down when bypassed—

equivalent to divide-by-one.

• The adjustable delay blocks on OUT5 and OUT6 are powered

down when not selected.

• Any output may be powered down. However, LVPECL

outputs have both a safe and an off condition. When the

LVPECL output is terminated, only the safe shutdown should

be used to protect the LVPECL output devices. This still

consumes some power.

• The entire distribution section can be powered down when

not needed.

Powering down a functional block does not cause the

programming information for that block (in the registers)

to be lost. This means that blocks can be powered on and off

without otherwise having to reprogram the AD9510. However,

synchronization is lost. A SYNC must be issued to

resynchronize (see the Single-Chip Synchronization section).

AD9510/PCB 数据表(PDF) 56 Page - Analog Devices

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