| 数据搜索系统,热门电子元器件搜索 |
|
AD9510/PCB 数据表(PDF) 12 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD9510/PCB 数据表(HTML) 12 Page - Analog Devices |
|
12 / 60 page ![]() AD9510 Rev. A | Page 12 of 60 CLOCK OUTPUT ADDITIVE TIME JITTER Table 6. Parameter Min Typ Max Unit Test Conditions/Comments LVPECL OUTPUT ADDITIVE TIME JITTER Distribution Section only; does not include PLL or external VCO/VCXO CLK1 = 622.08 MHz 40 fs rms BW = 12 kHz − 20 MHz (OC-12) Any LVPECL (OUT0 to OUT3) = 622.08 MHz Divide Ratio = 1 CLK1 = 622.08 MHz 55 fs rms BW = 12 kHz − 20 MHz (OC-3) Any LVPECL (OUT0 to OUT3) = 155.52 MHz Divide Ratio = 4 CLK1 = 400 MHz 215 fs rms Calculated from SNR of ADC method; FC = 100 MHz with AIN = 170 MHz Any LVPECL (OUT0 to OUT3) = 100 MHz Divide Ratio = 4 CLK1 = 400 MHz 215 fs rms Calculated from SNR of ADC method; FC = 100 MHz with AIN = 170 MHz Any LVPECL (OUT0 to OUT3) = 100 MHz Divide Ratio = 4 All Other LVPECL = 100 MHz Interferer(s) All LVDS (OUT4 to OUT7) = 100 MHz Interferer(s) CLK1 = 400 MHz 222 fs rms Calculated from SNR of ADC method; FC = 100 MHz with AIN = 170 MHz Any LVPECL (OUT0 to OUT3) = 100 MHz Divide Ratio = 4 All Other LVPECL = 50 MHz Interferer(s) All LVDS (OUT4 to OUT7) = 50 MHz Interferer(s) CLK1 = 400 MHz 225 fs rms Calculated from SNR of ADC method; FC = 100 MHz with AIN = 170 MHz Any LVPECL (OUT0 to OUT3) = 100 MHz Divide Ratio = 4 All Other LVPECL = 50 MHz Interferer(s) All CMOS (OUT4 to OUT7) = 50 MHz (B Outputs Off) Interferer(s) CLK1 = 400 MHz 225 fs rms Calculated from SNR of ADC method; FC = 100 MHz with AIN = 170 MHz Any LVPECL (OUT0 to OUT3) = 100 MHz Divide Ratio = 4 All Other LVPECL = 50 MHz Interferer(s) All CMOS (OUT4 to OUT7) = 50 MHz (B Outputs On) Interferer(s) LVDS OUTPUT ADDITIVE TIME JITTER Distribution Section only; does not include PLL or external VCO/VCXO CLK1 = 400 MHz 264 fs rms Calculated from SNR of ADC method; FC = 100 MHz with AIN = 170 MHz LVDS (OUT4, OUT7) = 100 MHz Divide Ratio = 4 CLK1 = 400 MHz 319 fs rms Calculated from SNR of ADC method; FC = 100 MHz with AIN = 170 MHz LVDS (OUT5, OUT6) = 100 MHz Divide Ratio = 4 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |