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ST92F124 数据表(PDF) 233 Page - STMicroelectronics |
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ST92F124 数据表(HTML) 233 Page - STMicroelectronics |
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233 / 429 page ![]() 233/429 MULTIPROTOCOL SERIAL COMMUNICATIONS INTERFACE (SCI-M) MULTIPROTOCOL SERIAL COMMUNICATIONS INTERFACE (Cont’d) CHARACTER CONFIGURATION REGISTER (CHCR) R250 - Read/Write Reset value: undefined Bit 7 = AM: Address Mode. This bit, together with the AMEN bit (in the IDPR register), decodes the desired addressing/9th data bit/character match operation. Please refer to the table in the IDPR register description. Bit 6 = EP: Even Parity. 0: Select odd parity (when parity is enabled). 1: Select even parity (when parity is enabled). Bit 5 = PEN: Parity Enable. 0: No parity bit. 1: Parity bit generated (transmit data) or checked (received data). Note: If the address/9th bit is enabled, the parity bit will precede the address/9th bit (the 9th bit is never included in the parity calculation). Bit 4 = AB: Address/9th Bit. 0: No Address/9th bit. 1: Address/9th bit included in the character format between the parity bit and the first stop bit. This bit can be used to address the SCI or as a ninth data bit. Bit 3:2 = SB[1:0]: Number of Stop Bits.. Bit 1:0 = WL[1:0]: Number of Data Bits 70 AM EP PEN AB SB1 SB0 WL1 WL0 SB1 SB0 Number of stop bits in 16X mode in 1X mode 00 1 1 01 1.5 2 10 2 2 11 2.5 3 WL1 WL0 Data Length 0 0 5 bits 0 1 6 bits 1 0 7 bits 1 1 8 bits 9 |
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