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PCF5083H/5V2/F3 数据表(PDF) 106 Page - NXP Semiconductors |
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PCF5083H/5V2/F3 数据表(HTML) 106 Page - NXP Semiconductors |
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106 / 136 page  1996 Oct 29 106 Philips Semiconductors Objective specification GSM signal processing IC PCF5083 Table 86 High priority interrupt mask register Note 1. RSTx = 0 means reset condition if either RSTO or RSTC is asserted; ‘ −’ denotes not affected from reset line. During reset (RST, RSTO, RSTC) only those registers with an explicitly given reset value are affected. All other registers are undefined and have to be set by the controller. Table 87 Serial Interface Interrupt Register Note 1. RSTx = 0 means reset condition if either RSTO or RSTC is asserted; ‘ −’ denotes not affected from reset line. During reset (RST, RSTO, RSTC) only those registers with an explicitly given reset value are affected. All other registers are undefined and have to be set by the controller. BIT R/W SYMBOL OPERATION (if bit is set) RST = 0 RSTx=0(1) 0 R/W RX_MASK Enable the RX_INT flag to assert the HIPR_INT interrupt line. 0 − 1 R/W RXTX_MASK Enable the RXTX_INT flag to assert the HIPR_INT interrupt line. 0 − 2 R/W TX_MASK Enable the TX_INT flag to assert the HIPR_INT interrupt line. 0 − 3 R/W MON_MASK Enable the MON_INT flag to assert the HIPR_INT interrupt line. 0 − 4 R/W AS_MASK Enable the AS_INT flag to assert the HIPR_INT interrupt line. 0 − 5 R/W FRAME_MASK Enable the FRAME_INT flag to assert the HIPR_INT interrupt line. 0 − 6 R/W PIRQN_MASK Enable the PIRQN_INT flag to assert the HIPR_INT interrupt line. 0 − 7 R/W PORQN_MASK Enable the PORQN_INT flag to assert the HIPR_INT interrupt line. 0 − BIT R/W SYMBOL OPERATION (if bit is set) RST = 0 RSTx=0(1) 0 R IMC_OBE RF Bus IMC channel output buffer empty. 0 − 1 R IMC_IBF RF Bus IMC channel input buffer full. 0 − 2 R TXD_OBE RS232 interface output buffer empty. 0 − 3 R RXD_IBF RS232 interface input buffer full. 0 − 4 R EXT_IOM External IOM®-2 interface request. 0 − 5 R PAR_ERR RS232 interface parity error. 0 − |
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