| 数据搜索系统,热门电子元器件搜索 |
|
PCF5083H/5V2/F3 数据表(PDF) 120 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
PCF5083H/5V2/F3 数据表(HTML) 120 Page - NXP Semiconductors |
|
120 / 136 page ![]() 1996 Oct 29 120 Philips Semiconductors Objective specification GSM signal processing IC PCF5083 Voice Port timing - non-transparent mode (see Fig.37 and note 14) 1(7) AFS setup time to ACLK HIGH 200 −− ns 2(7) AFS hold time after ACLK LOW 10 −− ns 3(7) ADO hold time after ACLK HIGH − 30 ns 4(7) ADI setup time to ACLK LOW 30 −− ns 5(7) ADI hold time to ACLK LOW 40 −− ns 6(7) ACLK frequency −− 1 MHz 7(7) ACLK HIGH time 400 −− ns 8(7) ACLK LOW time 400 −− ns JTAG Port timing (see Fig.38) 1 TCK LOW time 35 −− ns 2 TCK HIGH time 25 −− ns 3 TCK cycle time −− 10 ns 4 TMS setup time to TCK HIGH 10 −− ns 5 TMS hold time after TCK HIGH 30 −− ns 6 TDI setup time to TCK HIGH 5 −− ns 7 TDI hold time after TCK HIGH 30 −− ns 8 TDO asserted after TCK LOW −− 60 ns 9 TDO hold time after TCK LOW −− 60 ns 10 TDO 3-state after TCK LOW −− 30 ns 11 TRSTN pulse width 100 −− ns General purpose parallel port (see Fig.39) 1 PIO data valid after CLK13M rising edge (output) − 70 − ns 2 PIO data setup time − 10 − ns 3 PIO data valid after CLK13M rising edge (input) − 70 − ns All outputs tr(7) rise time −− 20 ns tf(7) fall time −− 20 ns NO PARAMETER MIN. TYP. MAX. UNIT |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |