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S12SCIV2/D 数据表(PDF) 111 Page - Freescale Semiconductor, Inc

部件名 S12SCIV2/D
功能描述  Device User Guide V01.18
PDF  130 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

S12SCIV2/D 数据表(HTML) 111 Page - Freescale Semiconductor, Inc

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MC9S12H256 Device User Guide — V01.18
Figure A-3 Jitter Definitions
The relative deviation of tnom is at its maximum for one clock period, and decreases towards zero for larger
number of clock periods (N).
Defining the jitter as:
For N < 100, the following equation is a good fit for the maximum jitter:
Figure A-4 Maximum bus clock jitter approximation
2
3
N–1
N
1
0
tnom
tmax1
tmin1
tmaxN
tminN
JN
()
max 1
t
max N
()
Nt
nom
⋅
---------------------
–
1
t
min N
()
Nt
nom
⋅
---------------------
–
,



=
JN
()
j
1
N
--------
j
2
+
=
1
5
10
20
N
J(N)
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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