ADIN1100BCPZ-R7 datasheet(26/80 Pages) AD

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Data Sheet

ADIN1100

BRINGING UP 10BASE-T1L LINKS

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Rev. B | 26 of 80

The following sections provide some recommendations on how to

bring a link up between the ADIN1100 and a remote link partner.

The sections cover various configurations and some may not be rel-

evant to the intended application. Refer to the Theory of Operation

section for more detailed explanations.

UNMANAGED PHY OPERATION

For an unmanaged PHY where there is no control of the ADIN1100

over the management interface, the hardware configuration pins

determine the operating mode. See the Hardware Configuration

Pins section for more details on how to use the hardware configu-

ration pins. The following sections describe the steps required to

bring up a link in unmanaged applications.

Set the PHY Address

The PHY address can be selected by asserting the PHY ad-

dress pins: RXD_2/PHYAD_0, RXD_3/PHYAD_1, and LINK_ST/

PHYAD_2.

When it exits reset, the ADIN1100 starts autonegotiation and tries

to bring up a link after autonegotiation completes.

See the PHY Address Configuration section for details on how to

use the address pins.

Disable Software Power-Down Mode After

Reset

The software power-down mode must be disabled in unmanaged

applications. Otherwise, the ADIN1100 remains in software power-

down indefinitely. Assert the RX_DV/RX_CTL/SWPD_EN pin high

during power-up and reset so that the PHY does not enter software

power-down mode when it exits reset.

See the Software Power-Down After Reset section for details on

how to configure the software power-down after reset function.

Master/Slave Selection

The RXD_1/MS_SEL pin is used to configure the PHY to advertise

prefer slave or prefer master.

See the Master/Slave Preference section for details on how to

configure the master/slave setting.

Set Transmit Amplitude Level

The RXD_0/TX2P4_EN pin configures the PHY to advertise the

support of both 1.0 V p-p and 2.4 V p-p transmit level operation or

to only advertise support of 1.0 V p-p transmit level operation.

By default, the ADIN1100 is configured to support 1.0 V p-p and 2.4

V p-p transmit levels due to the internal pull-down resistor. Assert

the relevant pin high or low to disable the support for the 2.4 V p-p

transmit level.

See the Transmit Amplitude section for details on how to configure

the transmit amplitude level.

Select the MAC Interface (RGMII/RMII/MII)

The MAC interface type can be selected using the RX_CLK/RXC/

MACIF_SEL0 and RX_ER/MACIF_SEL1 pins.

See the MAC Interface Selection for details on how to select the

MAC interface.

Enable the Media Converter Functionality

Assert the TXD_3/MEDIA_CNV pin high if media converter function

is required (RMII mode only).

See the Media Converter section for details on how to enable the

media converter functionality.

MANAGED PHY OPERATION

In a managed PHY application, a host controller such as a micro-

controller is used to configure the ADIN1100 operation in software

via the management interface (MDIO).

Similar to the unmanaged PHY operation, the hardware configura-

tion pins can be used to set up the controlled ADIN1100 (see the

Unmanaged PHY Operation section for details). Alternatively, the

hardware configuration pins can directly be controlled by the host

(for example, GPIO) via an external pull-up or pull-down resistor or

both.

In managed applications, the software power-down after reset can

be enabled. The ADIN1100 stays in software power-down mode

until the software has configured the PHY to be active. When

active, the PHY can then start autonegotiation and try to bring up a

link.

Power-Up and Reset Complete

A typical way for software to verify that the device has completed

the power-up and reset sequence and is available for normal

operation is to read the management register that has the IEEE or-

ganizationally unique identifier (OUI), model, and revision numbers.

The value of this register is unique to each PHY vendor and is a

nonzero value. If the device has not completed the power-up, the

value does not read correctly. In legacy BASE-T PHYs, this value

is at management interface Register Address 0x2 and Register

Address 0x3.

In the ADIN1100, the OUI, model number, and revision numbers

can also be read at Device Address 0x1F Clause 45 only), Register

Address 0x2, and Register Address 0x3 (Clause 22 and Clause

45).

MMD1_DEV_ID1 contains the OUI, Bits[3:18] (see the Vendor

Specific 1 MMD Identifier High Register section).

ADIN1100BCPZ-R7 数据表(PDF) 26 Page - Analog Devices

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