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ADIN1100BCPZ-R7 数据表(PDF) 7 Page - Analog Devices |
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ADIN1100BCPZ-R7 数据表(HTML) 7 Page - Analog Devices |
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7 / 80 page ![]() Data Sheet ADIN1100 TIMING CHARACTERISTICS analog.com Rev. B | 7 of 80 POWER-UP TIMING Table 3. Parameter Description Min Typ Max Unit tRAMP Power supply ramp time 40 ms t1 Minimum time interval to internal power good1 20 43 ms t2 Hardware configuration latch time 6 8 14 μs t3 Management interface active 50 ms 1 The minimum time interval is referenced to the last supply to reach its rising threshold. There is no specific power supply sequencing required. Figure 2. Power-Up Timing MANAGEMENT INTERFACE TIMING Table 4. Parameter Description Min Typ Max Unit t1 MDC period 400 ns t2 MDC high time 100 ns t3 MDC low time 100 ns t4 MDC rise or fall time 5 ns t5 MDIO signal setup time to MDC 10 ns t6 MDIO signal hold time to MDC 10 ns t7 MDIO delay time to MDC 300 ns Figure 3. Management Interface Timing |
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