数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

ADIN1100BCPZ-R7 数据表(PDF) 35 Page - Analog Devices

部件名 ADIN1100BCPZ-R7
功能描述  Robust, Industrial, Low Power 10BASE-T1L PHY
PDF  80 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADIN1100BCPZ-R7 数据表(HTML) 35 Page - Analog Devices

Back Button ADIN1100BCPZ-R7 Datasheet HTML 31Page - Analog Devices ADIN1100BCPZ-R7 Datasheet HTML 32Page - Analog Devices ADIN1100BCPZ-R7 Datasheet HTML 33Page - Analog Devices ADIN1100BCPZ-R7 Datasheet HTML 34Page - Analog Devices ADIN1100BCPZ-R7 Datasheet HTML 35Page - Analog Devices ADIN1100BCPZ-R7 Datasheet HTML 36Page - Analog Devices ADIN1100BCPZ-R7 Datasheet HTML 37Page - Analog Devices ADIN1100BCPZ-R7 Datasheet HTML 38Page - Analog Devices ADIN1100BCPZ-R7 Datasheet HTML 39Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 35 / 80 page
background image
Data Sheet
ADIN1100
APPLICATIONS INFORMATION
analog.com
Rev. B | 35 of 80
The output current for the LED_0 and LED_1 pins is 8 mA with
a VDDIO = 3.3 V (see the Specifications section for details). For
higher current requirements, consider using the circuit described in
the Transistor Controlled LED section.
Active High LED Polarity
In active high configuration, the LED_x pin can drive an external
LED from the anode side. Select the R0 and R1 resistors to control
the LED current (refer to the LED specifications in Table 1 for
information). External pull-down resistors (RPD0, RPD1) with a value
of 4.7 kΩ are recommended.
Figure 20. Active High LED Polarity Configuration
Active Low LED Polarity
In active low configuration, the LED_x pin can drive an external
LED from the cathode side. Select the R0 and R1 resistors to
control the LED current (refer to the LED specifications in Table 1
for information). External pull-up resistors (RPU0, RPU1) with a value
of 4.7 kΩ are recommended.
Figure 21. Active Low LED Polarity Configuration
Transistor Controlled LED
The following circuit displays a typical configuration where the LED
current required is higher than what the LED_0 and LED_1 pins
can supply. The circuit operates using the active high LED mode.
An external transistor such as an N channel MOSFET transistor
can be used. The transistor must be selected so that the gate input
capacitance is not sinking current above the maximum rating of the
LED_x pin during the actuation. Refer to the transistor technical
specifications for information. If required, the inrush current can be
reduced by placing a resistance between the transistor gate and the
ADIN1100 pin and/or adding a parallel capacitor between the GND
and the LED_x pin. The additional resistor and capacitor values
must be defined based on the transistor selection.
Select the R0 and R1 resistors to control the LED current (refer to
the selected LED and transistor specifications of the manufacturer
for information).
External pull-down resistors (RPD0, RPD1) with a value of 4.7 kΩ
are recommended. In Figure 22, VCC is the power supply used to
supply the LEDs.
Figure 22. Transistor Controlled LED Configuration
Autosense Polarity
In autosense mode, the polarity of the LED is automatically detect-
ed during power-up, hardware reset, or software reset. LED_0
(internal pull-up) and LED_1 (internal pull-down) have different
autosense behaviors due to their internal pull-up and pull-down
configurations. Use one of the configurations described in the
Active High LED Polarity, Active Low LED Polarity, and Transistor
Controlled LED sections so that the two LEDs can be controlled the
same way.
COMPONENT RECOMMENDATIONS
The ADIN1100 requires an external 25 MHz or 50 MHz clock, which
can be sourced from an external crystal oscillator (25 MHz) or an
external single-ended clock (25 MHz or 50 MHz). The RMII requires
an external 50 MHz clock as described in the External 50 MHz
Clock Input for RMII Mode section.
The signal voltage on the XTAL_I/CLK_IN pin (VCLK_IN) must be
a sine or filtered square wave signal with a peak-to-peak voltage
range from 0.8 V to 2.5 V. For the single-ended clock option, a
VCLK_IN with a 1.0 V p-p swing is recommended to achieve best
performance.
Various circuit configurations are proposed in the following sections.
A common circuit topology can be used across these options with a
change to the passive component values.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com