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ADAU1361BCPZ-R7 数据表(PDF) 49 Page - Analog Devices

部件名 ADAU1361BCPZ-R7
功能描述  Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL
PDF  78 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADAU1361BCPZ-R7 数据表(HTML) 49 Page - Analog Devices

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Data Sheet
ADAU1361
CONTROL REGISTERS
analog.com
Rev. E | 49 of 78
Table 34. Record Mixer Right (Mixer 2) Control 1 Register (Continued)
Bits
Bit Name
Description
Setting
Gain Boost
00
Mute (default)
01
0 dB
10
20 dB
11
Reserved
[2:0]
MX2AUXG[2:0]
Right single-ended auxiliary input gain from the RAUX pin in the record path, input to Mixer 2.
Setting
Auxiliary Input Gain
000
Mute (default)
001
−12 dB
010
−9 dB
011
−6 dB
100
−3 dB
101
0 dB
110
3 dB
111
6 dB
R8: Left Differential Input Volume Control, 16,398 (0x400E)
This register enables the differential path and sets the volume control for the left differential PGA input.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
LDVOL[5:0]
LDMUTE
LDEN
Table 35. Left Differential Input Volume Control Register
Bits
Bit Name
Description
[7:2]
LDVOL[5:0]
Left channel differential PGA input volume control. The left differential input uses the LINP (positive signal) and LINN (negative signal) pins.
Each step corresponds to a 0.75 dB increase in gain. See Table 71 for a complete list of the volume settings.
Setting
Volume
000000
−12 dB (default)
000001
−11.25 dB
…
…
010000
0 dB
…
…
111110
34.5 dB
111111
35.25 dB
1
LDMUTE
Left differential input mute control.
0 = mute (default).
1 = unmute.
0
LDEN
Left differential PGA enable. When enabled, the LINP and LINN pins are used as a full differential pair. When disabled, these two pins are
configured as two single-ended inputs with the signals routed around the PGA.
0 = disabled (default).
1 = enabled.
R9: Right Differential Input Volume Control, 16,399 (0x400F)
This register enables the differential path and sets the volume control for the right differential PGA input.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RDVOL[5:0]
RDMUTE
RDEN



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