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ADAU1361BCPZ-R7 数据表(PDF) 7 Page - Analog Devices

部件名 ADAU1361BCPZ-R7
功能描述  Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL
PDF  78 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADAU1361BCPZ-R7 数据表(HTML) 7 Page - Analog Devices

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Data Sheet
ADAU1361
SPECIFICATIONS
analog.com
Rev. E | 7 of 78
TYPICAL CURRENT CONSUMPTION
Main clock = 12.288 MHz, input sample rate = 48 kHz, input tone = 1 kHz, normal power management settings, ADC input @ −1 dBFS, DAC
input @ 0 dBFS. For total power consumption, add the IOVDD current listed in Table 2.
Table 3.
Operating Voltage
Audio Path
Clock Generation
Typical AVDD Current
Consumption (mA)
AVDD = IOVDD = 3.3 V
Record stereo differential to ADC
Direct MCLK
5.24
Integer PLL
6.57
DAC stereo playback to line output (10 kΩ)
Direct MCLK
5.55
Integer PLL
6.90
DAC stereo playback to headphone (16 Ω)
Direct MCLK
55.5
Integer PLL
56.8
DAC stereo playback to headphone (32 Ω)
Direct MCLK
30.9
Integer PLL
32.25
DAC stereo playback to capless headphone (32 Ω)
Direct MCLK
56.75
Integer PLL
58
Record aux stereo bypass to line output (10 kΩ)
Direct MCLK
1.9
Integer PLL
3.3
AVDD = IOVDD = 1.8 V
Record stereo differential to ADC
Direct MCLK
4.25
Integer PLL
5.55
DAC stereo playback to line output (10 kΩ)
Direct MCLK
4.7
Integer PLL
5.7
DAC stereo playback to headphone (16 Ω)
Direct MCLK
30.81
Integer PLL
32
DAC stereo playback to headphone (32 Ω)
Direct MCLK
18.3
Integer PLL
19.5
DAC stereo playback to capless headphone (32 Ω)
Direct MCLK
32.6
Integer PLL
33.7
Record aux stereo bypass to line output (10 kΩ)
Direct MCLK
1.9
Integer PLL
3.07
TYPICAL POWER MANAGEMENT MEASUREMENTS
Main clock = 12.288 MHz, integer PLL, input sample rate = 48 kHz, input tone = 1 kHz. Pseudo-differential input to ADCs, DACs to line output
with 10 kΩ load. ADC input @ −1 dBFS, DAC input @ 0 dBFS. In Table 4, the mixer boost and power management conditions are set for
MXBIAS[1:0], ADCBIAS[1:0], HPBIAS[1:0], and DACBIAS[1:0]. RBIAS[1:0] and PBIAS[1:0] do not have an extreme power saving mode and
are therefore set for power saving mode in the extreme power saving rows in Table 4.
Table 4.
Operating Voltage
Power Management Setting
Mixer Boost Setting
Typical AVDD Current
Consumption (mA)
Typical ADC THD + N
(dB)
Typical Line Output
THD + N (dB)
AVDD = IOVDD = 3.3 V
Normal (default)
Normal operation
9.6
−91
−92.5
Boost Level 1
9.75
−91.5
−92.5
Boost Level 2
9.92
−91.5
−92.5
Boost Level 3
10.25
−91.5
−92.5
Extreme power saving
Normal operation
7.09
−84.5
−87
Boost Level 1
7.19
−84.8
−87.1
Boost Level 2
7.29
−84.8
−87.1
Boost Level 3
7.49
−85
−87.1



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